[Bug rtl-optimization/107991] New: Extra mov instructions with ternary on x86

[Bug rtl-optimization/107991] New: Extra mov instructions with ternary on x86

[denis.campredon at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107991

            Bug ID: 107991
           Summary: Extra mov instructions with ternary on x86
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: denis.campredon at gmail dot com
  Target Milestone: ---

Compiled with -O2 on x86, gcc trunk produces 3 mov instructions for each of the
following functions:

int foo(bool b, int i, int j) {
    return b ? i - j : i;
}

int bar(bool b, int i, int j) {
    return i + (b ? -j : 0);
}

int baz(bool b, int i, int j) {
    return i - (b ? j : 0);
}

-------------

Whearas with gcc 7.5, only 1 mov was produced for foo and bar, and two for baz

[Bug rtl-optimization/107991] [10/11/12/13 Regression] Extra mov instructions with ternary on x86

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107991

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
            Version|unknown                     |12.2.0
           Keywords|                            |missed-optimization,
                   |                            |needs-bisection, ra
             Status|UNCONFIRMED                 |NEW
             Target|                            |x86_64-*-*
            Summary|Extra mov instructions with |[10/11/12/13 Regression]
                   |ternary on x86              |Extra mov instructions with
                   |                            |ternary on x86
      Known to work|                            |7.5.0
   Last reconfirmed|                            |2022-12-06
   Target Milestone|---                         |10.5

--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
Confirmed.  Argument setup related I guess.

[Bug middle-end/107991] [10/11/12/13 Regression] Extra mov instructions with ternary on x86

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107991

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to fail|                            |8.1.0
          Component|rtl-optimization            |middle-end

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
The huge difference comes from the middle-end:
Trunk (and not working):
(insn 12 11 13 4 (parallel [
            (set (reg/v:SI 85 [ i ])
                (minus:SI (reg/v:SI 85 [ i ])
                    (reg/v:SI 86 [ j ])))
            (clobber (reg:CC 17 flags))
        ]) "/app/example.cpp":2:14 discrim 1 -1
     (nil))

vs 7.5 (working case):
(insn 13 12 22 4 (parallel [
            (set (reg:SI 87 [ <retval> ])
                (minus:SI (reg/v:SI 90 [ i ])
                    (reg/v:SI 91 [ j ])))
            (clobber (reg:CC 17 flags))
        ]) "/app/example.cpp":2 -1
     (nil))

that is coalescing the PHI node:
  # iftmp.0_1 = PHI <iftmp.0_5(3), i_3(D)(2)>

to i rather than inserting a setting on the other branch.

[Bug middle-end/107991] [10/11/12/13 Regression] Extra mov instructions with ternary on x86

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107991

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |jakub at gcc dot gnu.org,
                   |                            |marxin at gcc dot gnu.org,
                   |                            |rsandifo at gcc dot gnu.org

--- Comment #3 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
2 mov insns in foo/bar instead of 1 started with
r8-1519-ge59a1c22fb249388e82b4fd004f33615abe36d2e PR79489 fix.
And 3 mov insns in all 3 instead of 2 started with the
r10-3679-g9b0365879b3c4917f5a2485a1fca8bb678484bfe change.

[Bug middle-end/107991] [10/11/12/13 Regression] Extra mov instructions with ternary on x86

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107991

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P2
           Keywords|needs-bisection             |

--- Comment #4 from Richard Biener <rguenth at gcc dot gnu.org> ---
Martins change doesn't look very related to me, Richards one does though.

[Bug middle-end/107991] [10/11/12/13 Regression] Extra mov instructions with ternary on x86

[rsandifo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107991

--- Comment #5 from rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> ---
From a slightly old build, but it looks like we have a redundant move:

(insn 4 27 28 2 (set (reg/v:SI 85 [ i ])
        (reg:SI 91)) "foo.c":9:31 83 {*movsi_internal}
     (expr_list:REG_DEAD (reg:SI 91)
        (nil)))

This causes problems because we can then assign different preferences
and costs to 85 and 91.  91 comes from input register SI and so prefers
SIREG while 85 feeds the result and so prefers AREG.

We should be able to cope better with this, will have a look in the new
year.

The output seems better with -fweb.

[Bug middle-end/107991] [10/11/12/13 Regression] Extra mov instructions with ternary on x86

[roger at nextmovesoftware dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107991

Roger Sayle <roger at nextmovesoftware dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |roger at nextmovesoftware dot com

--- Comment #6 from Roger Sayle <roger at nextmovesoftware dot com> ---
An x86 peephole2 to workaround the problem was proposed here:
https://gcc.gnu.org/pipermail/gcc-patches/2023-January/609578.html
but improved register allocation (if possible) would be a better solution:
https://gcc.gnu.org/pipermail/gcc-patches/2023-January/609588.html

[Bug middle-end/107991] [11/12/13/14 Regression] Extra mov instructions with ternary on x86

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107991

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|10.5                        |11.5

--- Comment #7 from Richard Biener <rguenth at gcc dot gnu.org> ---
GCC 10 branch is being closed.