[Bug c/108120] New: ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

[Bug c/108120] New: ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

[m.olbrich at pengutronix dot de]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108120

            Bug ID: 108120
           Summary: ICE: in extract_insn, at recog.cc:2791 (on ARM with
                    -mfpu=neon -freciprocal-math -O3)
           Product: gcc
           Version: 12.2.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
          Assignee: unassigned at gcc dot gnu.org
          Reporter: m.olbrich at pengutronix dot de
  Target Milestone: ---

Created attachment 54100
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=54100&action=edit
test-case to reproduce the ICE

When building the attached test-case with:

arm-linux-gnueabihf-gcc-12 -mfpu=neon -freciprocal-math -O3  -c w.c  -o
/dev/null

It fails with:

w.c: In function ‘b’:
w.c:7:1: error: unrecognizable insn:
    7 | }
      | ^
(insn 63 62 64 7 (set (reg:V4SF 209)
        (mult:V4SF (reg:V4SF 209)
            (reg:V4SF 210))) "w.c":6:21 -1
     (nil))
during RTL pass: vregs
w.c:7:1: internal compiler error: in extract_insn, at recog.cc:2791
0x7f33afb67189 __libc_start_call_main
        ../sysdeps/nptl/libc_start_call_main.h:58
0x7f33afb67244 __libc_start_main_impl
        ../csu/libc-start.c:381

This is with arm-linux-gnueabihf-gcc-12 12.2.0-9 from Debian but I've seen it
with the 12-20221022 snapshot and going back to at least gcc 9.2.

-mfpu=neon -freciprocal-math -O3 are all needed to reproduce this. It does not
happen with a different optimization level or -mfpu option.

[Bug target/108120] [11/12/13 Regression] ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108120

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to fail|                            |11.3.0, 13.0, 9.1.0
   Target Milestone|---                         |11.4
     Ever confirmed|0                           |1
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2022-12-15
            Summary|ICE: in extract_insn, at    |[11/12/13 Regression] ICE:
                   |recog.cc:2791 (on ARM with  |in extract_insn, at
                   |-mfpu=neon                  |recog.cc:2791 (on ARM with
                   |-freciprocal-math -O3)      |-mfpu=neon
                   |                            |-freciprocal-math -O3)

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Confirmed. there is a mismatch between div<mode>3 and ARM_HAVE_NEON_V2SF_ARITH
(ARM_HAVE_NEON_V4SF_ARITH )

/* SF operations always flush to zero, regardless of FPSCR.FZ, so we can
   only use them for general arithmetic when -funsafe-math-optimizations
   is in effect.  */
#define ARM_HAVE_NEON_V2SF_ARITH \
  (TARGET_NEON && flag_unsafe_math_optimizations)
#define ARM_HAVE_NEON_V4SF_ARITH ARM_HAVE_NEON_V2SF_ARITH

(define_expand "div<mode>3"
  [(set (match_operand:VCVTF 0 "s_register_operand")
        (div:VCVTF (match_operand:VCVTF 1 "s_register_operand")
                  (match_operand:VCVTF 2 "s_register_operand")))]
  "TARGET_NEON && !optimize_size
   && flag_reciprocal_math"


This mismatch was introduced with r9-3954-g536ecfc44b1fd2 which introduced the
div<mode>3 (note ARM_HAVE_NEON_V4SF_ARITH was done differently but still have
the check on flag_unsafe_math_optimizations).

I suspect div<mode>3 here should become:
(define_expand "div<mode>3"
  [(set (match_operand:VCVTF 0 "s_register_operand")
        (div:VCVTF (match_operand:VCVTF 1 "s_register_operand")
                  (match_operand:VCVTF 2 "s_register_operand")))]
  "ARM_HAVE_NEON_<MODE>_ARITH && !optimize_size
   && flag_reciprocal_math"

Note the iterator here maybe should be VF too but I am not 100% sure the HF
modes support all the instructions that this generates.

[Bug target/108120] [10/11/12/13 Regression] ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108120

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to work|                            |8.1.0
   Target Milestone|11.4                        |10.5
            Summary|[11/12/13 Regression] ICE:  |[10/11/12/13 Regression]
                   |in extract_insn, at         |ICE: in extract_insn, at
                   |recog.cc:2791 (on ARM with  |recog.cc:2791 (on ARM with
                   |-mfpu=neon                  |-mfpu=neon
                   |-freciprocal-math -O3)      |-freciprocal-math -O3)

[Bug target/108120] [10/11/12/13 Regression] ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108120

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P2

[Bug target/108120] [11/12/13/14 Regression] ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108120

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|10.5                        |11.5

--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
GCC 10 branch is being closed.

[Bug target/108120] [11/12/13/14 Regression] ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108120

--- Comment #3 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Richard Earnshaw <rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:016c4eed368b80a97101f6156ed99e4c5474fbb7

commit r14-9152-g016c4eed368b80a97101f6156ed99e4c5474fbb7
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Thu Feb 22 16:47:20 2024 +0000

    arm: fix ICE with vectorized reciprocal division [PR108120]

    The expand pattern for reciprocal division was enabled for all math
    optimization modes, but the patterns it was generating were not
    enabled unless -funsafe-math-optimizations were enabled, this leads to
    an ICE when the pattern we generate cannot be recognized.

    Fixed by only enabling vector division when doing unsafe math.

    gcc:

            PR target/108120
            * config/arm/neon.md (div<VCVTF:mode>3): Rename from div<mode>3.
            Gate with ARM_HAVE_NEON_<MODE>_ARITH.

    gcc/testsuite:
            PR target/108120
            * gcc.target/arm/neon-recip-div-1.c: New file.

[Bug target/108120] [11/12/13 Regression] ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

[rearnsha at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108120

Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
            Summary|[11/12/13/14 Regression]    |[11/12/13 Regression] ICE:
                   |ICE: in extract_insn, at    |in extract_insn, at
                   |recog.cc:2791 (on ARM with  |recog.cc:2791 (on ARM with
                   |-mfpu=neon                  |-mfpu=neon
                   |-freciprocal-math -O3)      |-freciprocal-math -O3)

--- Comment #4 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
Fixed on trunk so far.

[Bug target/108120] [11/12/13 Regression] ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108120

--- Comment #5 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-13 branch has been updated by Richard Earnshaw
<rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:f78d1b9c26c2def0e9c54610e73e21f91b5eb05b

commit r13-8359-gf78d1b9c26c2def0e9c54610e73e21f91b5eb05b
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Thu Feb 22 16:47:20 2024 +0000

    arm: fix ICE with vectorized reciprocal division [PR108120]

    The expand pattern for reciprocal division was enabled for all math
    optimization modes, but the patterns it was generating were not
    enabled unless -funsafe-math-optimizations were enabled, this leads to
    an ICE when the pattern we generate cannot be recognized.

    Fixed by only enabling vector division when doing unsafe math.

    gcc:

            PR target/108120
            * config/arm/neon.md (div<VCVTF:mode>3): Rename from div<mode>3.
            Gate with ARM_HAVE_NEON_<MODE>_ARITH.

    gcc/testsuite:
            PR target/108120
            * gcc.target/arm/neon-recip-div-1.c: New file.

    (cherry picked from commit 016c4eed368b80a97101f6156ed99e4c5474fbb7)

[Bug target/108120] [11/12 Regression] ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

[rearnsha at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108120

Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
            Summary|[11/12/13 Regression] ICE:  |[11/12 Regression] ICE: in
                   |in extract_insn, at         |extract_insn, at
                   |recog.cc:2791 (on ARM with  |recog.cc:2791 (on ARM with
                   |-mfpu=neon                  |-mfpu=neon
                   |-freciprocal-math -O3)      |-freciprocal-math -O3)
           Assignee|unassigned at gcc dot gnu.org      |rearnsha at gcc dot gnu.org
             Status|NEW                         |ASSIGNED

[Bug target/108120] [11/12 Regression] ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108120

--- Comment #6 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-12 branch has been updated by Richard Earnshaw
<rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:0de82d2c2ec0b7ed65a1122884feab40f90c0483

commit r12-10174-g0de82d2c2ec0b7ed65a1122884feab40f90c0483
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Thu Feb 22 16:47:20 2024 +0000

    arm: fix ICE with vectorized reciprocal division [PR108120]

    The expand pattern for reciprocal division was enabled for all math
    optimization modes, but the patterns it was generating were not
    enabled unless -funsafe-math-optimizations were enabled, this leads to
    an ICE when the pattern we generate cannot be recognized.

    Fixed by only enabling vector division when doing unsafe math.

    gcc:

            PR target/108120
            * config/arm/neon.md (div<VCVTF:mode>3): Rename from div<mode>3.
            Gate with ARM_HAVE_NEON_<MODE>_ARITH.

    gcc/testsuite:
            PR target/108120
            * gcc.target/arm/neon-recip-div-1.c: New file.

    (cherry picked from commit 016c4eed368b80a97101f6156ed99e4c5474fbb7)

[Bug target/108120] [11/12 Regression] ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108120

--- Comment #7 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by Richard Earnshaw
<rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:98032b3e320a5b63309d6a843f6e97fb0506953a

commit r11-11251-g98032b3e320a5b63309d6a843f6e97fb0506953a
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Thu Feb 22 16:47:20 2024 +0000

    arm: fix ICE with vectorized reciprocal division [PR108120]

    The expand pattern for reciprocal division was enabled for all math
    optimization modes, but the patterns it was generating were not
    enabled unless -funsafe-math-optimizations were enabled, this leads to
    an ICE when the pattern we generate cannot be recognized.

    Fixed by only enabling vector division when doing unsafe math.

    gcc:

            PR target/108120
            * config/arm/neon.md (div<VCVTF:mode>3): Rename from div<mode>3.
            Gate with ARM_HAVE_NEON_<MODE>_ARITH.

    gcc/testsuite:
            PR target/108120
            * gcc.target/arm/neon-recip-div-1.c: New file.

    (cherry picked from commit 016c4eed368b80a97101f6156ed99e4c5474fbb7)

[Bug target/108120] [11/12 Regression] ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

[rearnsha at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108120

Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|---                         |FIXED

--- Comment #8 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
Fixed on all active branches