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* [Bug target/108987] New: [13 Regression] RISC-V: shiftadd cost model bug needlessly preferring syth_multiply
@ 2023-03-01 19:34 vineetg at rivosinc dot com
  2023-03-01 19:56 ` [Bug target/108987] " vineetg at rivosinc dot com
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: vineetg at rivosinc dot com @ 2023-03-01 19:34 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108987

            Bug ID: 108987
           Summary: [13 Regression] RISC-V: shiftadd cost model bug
                    needlessly preferring syth_multiply
           Product: gcc
           Version: 13.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: vineetg at rivosinc dot com
  Target Milestone: ---

gcc trunk is preferring synthetic multiply using shift+add even when they are
costlier than multiply.

unsigned long long f5(unsigned long long i)
{
  return i * 0x0202020202020202ULL;
}

riscv64-unknown-linux-gnu-gcc -c -O2 -march=rv64gc_zba

f5:
        slli    a5,a0,8
        add     a0,a5,a0
        slli    a5,a0,16
        add     a0,a0,a5
        slli    a5,a0,32
        add     a0,a0,a5
        slli    a0,a0,1
        ret

With gcc 12.2 this used to be

f5:
        lui     a5,%hi(.LC0)
        ld      a5,%lo(.LC0)(a5)
        mul     a0,a0,a5
        ret

This is a regression introduced by commit f90cb39235c4 ("RISC-V: costs: support
shift-and-add in strength-reduction"). It introduced the cost for
shift[1-3]+add (to favor SH*ADD) but due to a coding bug ended up doing this
for all shift values, affecting synth multiply among others.

This showed up as dynamic icount regression in SPEC 531.deepsjeng.

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [Bug target/108987] [13 Regression] RISC-V: shiftadd cost model bug needlessly preferring syth_multiply
  2023-03-01 19:34 [Bug target/108987] New: [13 Regression] RISC-V: shiftadd cost model bug needlessly preferring syth_multiply vineetg at rivosinc dot com
@ 2023-03-01 19:56 ` vineetg at rivosinc dot com
  2023-03-02 10:11 ` rguenth at gcc dot gnu.org
  2023-03-06 21:50 ` vineetg at rivosinc dot com
  2 siblings, 0 replies; 4+ messages in thread
From: vineetg at rivosinc dot com @ 2023-03-01 19:56 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108987

--- Comment #1 from Vineet Gupta <vineetg at rivosinc dot com> ---
Fix posted here

https://gcc.gnu.org/pipermail/gcc-patches/2023-March/613106.html

Essentially:

   case PLUS:

      if (TARGET_ZBA
          && mode == word_mode
          && GET_CODE (XEXP (x, 0)) == MULT
          && REG_P (XEXP (XEXP (x, 0), 0))
          && CONST_INT_P (XEXP (XEXP (x, 0), 1))
-         && IN_RANGE (pow2p_hwi (INTVAL (XEXP (XEXP (x, 0), 1))), 1, 3))
+         && pow2p_hwi (INTVAL (XEXP (XEXP (x, 0), 1)))
+         && IN_RANGE (exact_log2 (INTVAL (XEXP (XEXP (x, 0), 1))), 1, 3))
        {
          *total = COSTS_N_INSNS (1);
          return true;
        }

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [Bug target/108987] [13 Regression] RISC-V: shiftadd cost model bug needlessly preferring syth_multiply
  2023-03-01 19:34 [Bug target/108987] New: [13 Regression] RISC-V: shiftadd cost model bug needlessly preferring syth_multiply vineetg at rivosinc dot com
  2023-03-01 19:56 ` [Bug target/108987] " vineetg at rivosinc dot com
@ 2023-03-02 10:11 ` rguenth at gcc dot gnu.org
  2023-03-06 21:50 ` vineetg at rivosinc dot com
  2 siblings, 0 replies; 4+ messages in thread
From: rguenth at gcc dot gnu.org @ 2023-03-02 10:11 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108987

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |missed-optimization
             Target|                            |riscv
   Target Milestone|---                         |13.0

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [Bug target/108987] [13 Regression] RISC-V: shiftadd cost model bug needlessly preferring syth_multiply
  2023-03-01 19:34 [Bug target/108987] New: [13 Regression] RISC-V: shiftadd cost model bug needlessly preferring syth_multiply vineetg at rivosinc dot com
  2023-03-01 19:56 ` [Bug target/108987] " vineetg at rivosinc dot com
  2023-03-02 10:11 ` rguenth at gcc dot gnu.org
@ 2023-03-06 21:50 ` vineetg at rivosinc dot com
  2 siblings, 0 replies; 4+ messages in thread
From: vineetg at rivosinc dot com @ 2023-03-06 21:50 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108987

Vineet Gupta <vineetg at rivosinc dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|UNCONFIRMED                 |RESOLVED

--- Comment #2 from Vineet Gupta <vineetg at rivosinc dot com> ---
This is now merged in trunk

commit 7e52f4420ffb0946dfc97704d72fa8aa67251495
Author: Vineet Gupta <vineetg@rivosinc.com>
Date:   Wed Mar 1 11:53:15 2023 -0800

RISC-V: costs: miscomputed shiftadd_cost triggering synth_mult [PR/108987]

This showed up as dynamic icount regression in SPEC 531.deepsjeng with upstream
gcc (vs. gcc 12.2). gcc was resorting to synthetic multiply using shift+add(s)
even when multiply had clear cost benefit.

....

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2023-03-06 21:50 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2023-03-01 19:34 [Bug target/108987] New: [13 Regression] RISC-V: shiftadd cost model bug needlessly preferring syth_multiply vineetg at rivosinc dot com
2023-03-01 19:56 ` [Bug target/108987] " vineetg at rivosinc dot com
2023-03-02 10:11 ` rguenth at gcc dot gnu.org
2023-03-06 21:50 ` vineetg at rivosinc dot com

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