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* [Bug target/109547] New: RISC-V: Multiple vsetvli for load/store loop
@ 2023-04-18 22:24 palmer at gcc dot gnu.org
  2023-04-19  0:25 ` [Bug target/109547] " kito at gcc dot gnu.org
                   ` (5 more replies)
  0 siblings, 6 replies; 7+ messages in thread
From: palmer at gcc dot gnu.org @ 2023-04-18 22:24 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109547

            Bug ID: 109547
           Summary: RISC-V: Multiple vsetvli for load/store loop
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: palmer at gcc dot gnu.org
  Target Milestone: ---

I was just poking around with a simple loop using the vector intrinsics and
found some odd generated code.  This is on the gcc-13 branch, but that's pretty
close to trunk so I'm filing it for 14.  I'm probably not going to have time to
look for a bit, as it seems to just be a performance issue.

$ cat test.c
#include <riscv_vector.h>

void func(unsigned char *out, unsigned char *in, unsigned long len) {
  unsigned long i = 0;
  while (i < len) {
    unsigned long vl = __riscv_vsetvl_e8m1(len - i);
    vuint8m1_t r = __riscv_vle8_v_u8m1(in + i, vl);
    __riscv_vse8_v_u8m1(out + i, r, vl);
    i += vl;
  }
}
$ ../toolchain/install/bin/riscv64-unknown-linux-gnu-gcc test.c -O3 -c -S -o-
-march=rv64gcv -fdump-rtl-all
        .file   "test.c"
        .option nopic
        .attribute arch,
"rv64i2p0_m2p0_a2p0_f2p0_d2p0_c2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0"
        .attribute unaligned_access, 0
        .attribute stack_align, 16
        .text
        .align  1
        .globl  func
        .type   func, @function
func:
.LFB2:
        .cfi_startproc
        beq     a2,zero,.L1
        li      a5,0
.L3:
        sub     a4,a2,a5
        add     a6,a1,a5
        add     a3,a0,a5
        vsetvli a4,a4,e8,m1,ta,mu
        vsetvli zero,a4,e8,m1,ta,ma
        add     a5,a5,a4
        vle8.v  v24,0(a6)
        vse8.v  v24,0(a3)
        bgtu    a2,a5,.L3
.L1:
        ret
        .cfi_endproc
.LFE2:
        .size   func, .-func
        .ident  "GCC: (g85b95ea729c) 13.0.1 20230417 (prerelease)"
        .section        .note.GNU-stack,"",@progbits

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2023-05-29 12:47 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-04-18 22:24 [Bug target/109547] New: RISC-V: Multiple vsetvli for load/store loop palmer at gcc dot gnu.org
2023-04-19  0:25 ` [Bug target/109547] " kito at gcc dot gnu.org
2023-04-19  1:01 ` juzhe.zhong at rivai dot ai
2023-04-21  6:46 ` cvs-commit at gcc dot gnu.org
2023-04-21  6:51 ` [Bug target/109547] [13] " kito at gcc dot gnu.org
2023-05-29 10:35 ` cvs-commit at gcc dot gnu.org
2023-05-29 12:47 ` kito at gcc dot gnu.org

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