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From: "wangfeng at eswincomputing dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/109592] Failure to recognize shifts as sign/zero extension
Date: Mon, 24 Apr 2023 03:52:04 +0000	[thread overview]
Message-ID: <bug-109592-4-D0To1uk4xm@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-109592-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109592

--- Comment #2 from Feng Wang <wangfeng at eswincomputing dot com> ---
(In reply to Feng Wang from comment #1)
> Hi Jeff,
> 
> I have modified some code according to your suggestion.
> In simplify-rtx.cc I add below part in canonicalize_shift:
>       if ((code == ASHIFTRT)
>           && is_a <scalar_int_mode> (mode, &int_mode)
>           && GET_CODE (op0) == ASHIFT
>           && CONST_INT_P (op1)
>           && is_a <scalar_int_mode> (GET_MODE (op0), &inner_mode)
>           && CONST_INT_P (XEXP (op0, 1))
>           && (INTVAL (XEXP (op0, 1)) == INTVAL (op1)))
>         {
>           tem = XEXP (op0, 0);
>           if (SUBREG_P(XEXP (op0, 0))
>               && is_a <scalar_int_mode> (GET_MODE (SUBREG_REG (XEXP (op0,
> 0))),
>                                          &inner_mode)
>               && GET_MODE_BITSIZE (inner_mode) > GET_MODE_BITSIZE (int_mode))
>           {
>             tem = XEXP (XEXP (op0, 0), 0);
>           }
> 
>           if ((INTVAL (op1) + 8 == 32) || (INTVAL (op1) + 8 == 64))
>           {
>             op0 = lowpart_subreg (E_QImode, tem, GET_MODE(tem));
>             return simplify_gen_unary (SIGN_EXTEND, int_mode, op0, int_mode);
>           }
> 
>           if ((INTVAL (op1) + 16 == 32) || (INTVAL (op1) + 16 == 64))
>           {
>             op0 = lowpart_subreg (E_HImode, tem, GET_MODE(tem));
>             return simplify_gen_unary (SIGN_EXTEND, int_mode, op0, int_mode);
>           }
>         }
> 
> and at the same time in fwprop.cc I add below conditions in classify_result
> to judge whether replacement is PROFITABLE
>     /* If have load byte or load half pattern, we can covert
>      ashiftrt(ashift(object)const)const to load byte or half form object */
>   if (GET_CODE(old_rtx) == ASHIFTRT
>       && GET_CODE(new_rtx) == SIGN_EXTEND
>       && ((GET_MODE(new_rtx) == E_SImode
>            && ((GET_MODE(XEXP(new_rtx, 0)) == E_QImode 
>                 && HAVE_extendqisi2)
>             || (GET_MODE(XEXP(new_rtx, 0)) == E_HImode
>                 && HAVE_extendhisi2)))
>           ||(GET_MODE(new_rtx) == E_DImode
>            && ((GET_MODE(XEXP(new_rtx, 0)) == E_QImode
>                  && HAVE_extendqidi2)
>             || (GET_MODE(XEXP(new_rtx, 0)) == E_HImode
>                  && HAVE_extendhidi2))))
>     return PROFITABLE;
> 
> Please check if it is reasonable and look forward to further discussion with
> you.Thanks!

  parent reply	other threads:[~2023-04-24  3:52 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-22  0:12 [Bug rtl-optimization/109592] New: " law at gcc dot gnu.org
2023-04-24  2:46 ` [Bug rtl-optimization/109592] " wangfeng at eswincomputing dot com
2023-04-24  3:52 ` wangfeng at eswincomputing dot com [this message]
2023-04-24  7:02 ` rguenth at gcc dot gnu.org
2023-04-28 20:26 ` law at gcc dot gnu.org
2023-05-11  7:56 ` wangfeng at eswincomputing dot com
2023-05-11 14:33 ` law at gcc dot gnu.org
2023-05-29 16:35 ` law at gcc dot gnu.org
2023-05-30  6:17 ` wangfeng at eswincomputing dot com
2023-05-30 20:40 ` law at gcc dot gnu.org
2023-05-30 20:41 ` law at gcc dot gnu.org

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