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From: "wangfeng at eswincomputing dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/109592] Failure to recognize shifts as sign/zero extension
Date: Tue, 30 May 2023 06:17:45 +0000	[thread overview]
Message-ID: <bug-109592-4-eajNsMoiI4@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-109592-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109592

--- Comment #8 from Feng Wang <wangfeng at eswincomputing dot com> ---
(In reply to Jeffrey A. Law from comment #7)
> Attached is what I cobbled together.  It doesn't use magic numbers.  But it
> doesn't yet handle zero extensions in the simplify-rtx code.  But I think it
> shows the overall direction fairly well.
Sorry, I can't find the attachement. I think we need to consider more here,such
as the cost of zero/sign extensions, only convert shifts to zero/sign
extensions when it cost less in certain hardware architectures. At the same we
also consider the shift ins is more suitable for combine pass.Maybe We should
consider that whether the conversion prevents a better combination in combine
pass(I need study a suitable test case).

  parent reply	other threads:[~2023-05-30  6:17 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-22  0:12 [Bug rtl-optimization/109592] New: " law at gcc dot gnu.org
2023-04-24  2:46 ` [Bug rtl-optimization/109592] " wangfeng at eswincomputing dot com
2023-04-24  3:52 ` wangfeng at eswincomputing dot com
2023-04-24  7:02 ` rguenth at gcc dot gnu.org
2023-04-28 20:26 ` law at gcc dot gnu.org
2023-05-11  7:56 ` wangfeng at eswincomputing dot com
2023-05-11 14:33 ` law at gcc dot gnu.org
2023-05-29 16:35 ` law at gcc dot gnu.org
2023-05-30  6:17 ` wangfeng at eswincomputing dot com [this message]
2023-05-30 20:40 ` law at gcc dot gnu.org
2023-05-30 20:41 ` law at gcc dot gnu.org

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