public inbox for gcc-bugs@sourceware.org
help / color / mirror / Atom feed
* [Bug target/109697] New: arm: lack of MVE instruction costing causing worse codegen on a vec_duplicate
@ 2023-05-02 12:11 stammark at gcc dot gnu.org
2023-05-18 10:01 ` [Bug target/109697] " cvs-commit at gcc dot gnu.org
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: stammark at gcc dot gnu.org @ 2023-05-02 12:11 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109697
Bug ID: 109697
Summary: arm: lack of MVE instruction costing causing worse
codegen on a vec_duplicate
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: stammark at gcc dot gnu.org
Target Milestone: ---
Hi all,
In the arm backend, for MVE targets we previously had this bug on the vcmp
patterns: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107987
The fix is fine, but it resulted in some failing tests:
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c
* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c
* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c
(after Andrea improved these tests in GCC13)
The testcases that are failing are the ones that compare against a scalar
immediate (e.g. "vcmpeqq (a, 1.1)"), because the compiler prefers to do:
```
vldr.64 d6, .L5
vldr.64 d7, .L5+8
vcmp.f16 eq, q0, q3
```
When previously we would much more simply:
```
movs r3, #1
vcmp.u16 cs, q0, r3
```
The underlying reason for this change is a known deficiency of the MVE
implementation: the lack of proper instruction costing.
The compiler falls back to calculating costs based on the operands and the new
vec_duplicate in the patterns (mve_vcmp<mve_cmp_op>q_n_<mode>, etc) gets given
a cost of 32 (when instead it should know that the vec duplicate is free and
this is all just one instruction...), so the "literal load + vector-vector
compare" wins out against the "put the immediate in a GP reg + vector-scalar
compare".
For now, I plan on simply XFAIL-ing the tests.
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Bug target/109697] arm: lack of MVE instruction costing causing worse codegen on a vec_duplicate
2023-05-02 12:11 [Bug target/109697] New: arm: lack of MVE instruction costing causing worse codegen on a vec_duplicate stammark at gcc dot gnu.org
@ 2023-05-18 10:01 ` cvs-commit at gcc dot gnu.org
2023-05-18 10:13 ` cvs-commit at gcc dot gnu.org
2023-05-18 10:44 ` cvs-commit at gcc dot gnu.org
2 siblings, 0 replies; 4+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2023-05-18 10:01 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109697
--- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-13 branch has been updated by Stam Markianos-Wright
<stammark@gcc.gnu.org>:
https://gcc.gnu.org/g:f9b84a16510c91af29add6cb1855306dfc8af035
commit r13-7351-gf9b84a16510c91af29add6cb1855306dfc8af035
Author: Stam Markianos-Wright <stam.markianos-wright@arm.com>
Date: Thu Apr 27 15:54:16 2023 +0100
arm testsuite: XFAIL or relax registers in some tests [PR109697]
This is a simple testsuite tidy-up patch, addressing to types of errors:
* The vcmp vector-scalar tests failing due to the compiler's preference
of vector-vector comparisons, over vector-scalar comparisons. This is
due to the lack of cost model for MVE and the compiler not knowing that
the RTL vec_duplicate is free in those instructions. For now, we simply
XFAIL these checks.
* The tests for pr108177 had strict usage of q0 and r0 registers,
meaning that they would FAIL with -mfloat-abi=softf. The register checks
have now been relaxed. A couple of these run-tests also had incosistent
use of integer MVE with floating point vectors, so I've now changed
these to use FP MVE.
gcc/testsuite/ChangeLog:
PR target/109697
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: XFAIL check.
* gcc.target/arm/mve/pr108177-1.c: Relax registers.
* gcc.target/arm/mve/pr108177-10.c: Relax registers.
* gcc.target/arm/mve/pr108177-11.c: Relax registers.
* gcc.target/arm/mve/pr108177-12.c: Relax registers.
* gcc.target/arm/mve/pr108177-13.c: Relax registers.
* gcc.target/arm/mve/pr108177-13-run.c: use mve_fp
* gcc.target/arm/mve/pr108177-14.c: Relax registers.
* gcc.target/arm/mve/pr108177-14-run.c: use mve_fp
* gcc.target/arm/mve/pr108177-2.c: Relax registers.
* gcc.target/arm/mve/pr108177-3.c: Relax registers.
* gcc.target/arm/mve/pr108177-4.c: Relax registers.
* gcc.target/arm/mve/pr108177-5.c: Relax registers.
* gcc.target/arm/mve/pr108177-6.c: Relax registers.
* gcc.target/arm/mve/pr108177-7.c: Relax registers.
* gcc.target/arm/mve/pr108177-8.c: Relax registers.
* gcc.target/arm/mve/pr108177-9.c: Relax registers.
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Bug target/109697] arm: lack of MVE instruction costing causing worse codegen on a vec_duplicate
2023-05-02 12:11 [Bug target/109697] New: arm: lack of MVE instruction costing causing worse codegen on a vec_duplicate stammark at gcc dot gnu.org
2023-05-18 10:01 ` [Bug target/109697] " cvs-commit at gcc dot gnu.org
@ 2023-05-18 10:13 ` cvs-commit at gcc dot gnu.org
2023-05-18 10:44 ` cvs-commit at gcc dot gnu.org
2 siblings, 0 replies; 4+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2023-05-18 10:13 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109697
--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Stam Markianos-Wright
<stammark@gcc.gnu.org>:
https://gcc.gnu.org/g:7587c2e3844baf26255a7cc6e1d291240a1c28d3
commit r14-966-g7587c2e3844baf26255a7cc6e1d291240a1c28d3
Author: Stam Markianos-Wright <stam.markianos-wright@arm.com>
Date: Thu Apr 27 15:54:16 2023 +0100
arm testsuite: XFAIL or relax registers in some tests [PR109697]
Hi all,
This is a simple testsuite tidy-up patch, addressing to types of errors:
* The vcmp vector-scalar tests failing due to the compiler's preference
of vector-vector comparisons, over vector-scalar comparisons. This is
due to the lack of cost model for MVE and the compiler not knowing that
the RTL vec_duplicate is free in those instructions. For now, we simply
XFAIL these checks.
* The tests for pr108177 had strict usage of q0 and r0 registers,
meaning that they would FAIL with -mfloat-abi=softf. The register checks
have now been relaxed. A couple of these run-tests also had incosistent
use of integer MVE with floating point vectors, so I've now changed these
to use FP MVE.
gcc/testsuite/ChangeLog:
PR target/109697
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: XFAIL check.
* gcc.target/arm/mve/pr108177-1.c: Relax registers.
* gcc.target/arm/mve/pr108177-10.c: Relax registers.
* gcc.target/arm/mve/pr108177-11.c: Relax registers.
* gcc.target/arm/mve/pr108177-12.c: Relax registers.
* gcc.target/arm/mve/pr108177-13.c: Relax registers.
* gcc.target/arm/mve/pr108177-13-run.c: use mve_fp
* gcc.target/arm/mve/pr108177-14.c: Relax registers.
* gcc.target/arm/mve/pr108177-14-run.c: use mve_fp
* gcc.target/arm/mve/pr108177-2.c: Relax registers.
* gcc.target/arm/mve/pr108177-3.c: Relax registers.
* gcc.target/arm/mve/pr108177-4.c: Relax registers.
* gcc.target/arm/mve/pr108177-5.c: Relax registers.
* gcc.target/arm/mve/pr108177-6.c: Relax registers.
* gcc.target/arm/mve/pr108177-7.c: Relax registers.
* gcc.target/arm/mve/pr108177-8.c: Relax registers.
* gcc.target/arm/mve/pr108177-9.c: Relax registers.
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Bug target/109697] arm: lack of MVE instruction costing causing worse codegen on a vec_duplicate
2023-05-02 12:11 [Bug target/109697] New: arm: lack of MVE instruction costing causing worse codegen on a vec_duplicate stammark at gcc dot gnu.org
2023-05-18 10:01 ` [Bug target/109697] " cvs-commit at gcc dot gnu.org
2023-05-18 10:13 ` cvs-commit at gcc dot gnu.org
@ 2023-05-18 10:44 ` cvs-commit at gcc dot gnu.org
2 siblings, 0 replies; 4+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2023-05-18 10:44 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109697
--- Comment #3 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-12 branch has been updated by Stam Markianos-Wright
<stammark@gcc.gnu.org>:
https://gcc.gnu.org/g:8ed701b52847e49d63634f03ec8800ff92b76dea
commit r12-9621-g8ed701b52847e49d63634f03ec8800ff92b76dea
Author: Stam Markianos-Wright <stam.markianos-wright@arm.com>
Date: Thu Apr 27 15:54:16 2023 +0100
arm testsuite: XFAIL or relax registers in some tests [PR109697]
Hi all,
This is a simple testsuite tidy-up patch, addressing to types of errors:
* The vcmp vector-scalar tests failing due to the compiler's preference
of vector-vector comparisons, over vector-scalar comparisons. This is
due to the lack of cost model for MVE and the compiler not knowing that
the RTL vec_duplicate is free in those instructions. For now, we simply
XFAIL these checks.
* The tests for pr108177 had strict usage of q0 and r0 registers,
meaning that they would FAIL with -mfloat-abi=softf. The register checks
have now been relaxed. A couple of these run-tests also had incosistent
use of integer MVE with floating point vectors, so I've now changed
these to use FP MVE.
gcc/testsuite/ChangeLog:
PR target/109697
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: XFAIL check.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: XFAIL check.
* gcc.target/arm/mve/pr108177-1.c: Relax registers.
* gcc.target/arm/mve/pr108177-10.c: Relax registers.
* gcc.target/arm/mve/pr108177-11.c: Relax registers.
* gcc.target/arm/mve/pr108177-12.c: Relax registers.
* gcc.target/arm/mve/pr108177-13.c: Relax registers.
* gcc.target/arm/mve/pr108177-13-run.c: use mve_fp
* gcc.target/arm/mve/pr108177-14.c: Relax registers.
* gcc.target/arm/mve/pr108177-14-run.c: use mve_fp
* gcc.target/arm/mve/pr108177-2.c: Relax registers.
* gcc.target/arm/mve/pr108177-3.c: Relax registers.
* gcc.target/arm/mve/pr108177-4.c: Relax registers.
* gcc.target/arm/mve/pr108177-5.c: Relax registers.
* gcc.target/arm/mve/pr108177-6.c: Relax registers.
* gcc.target/arm/mve/pr108177-7.c: Relax registers.
* gcc.target/arm/mve/pr108177-8.c: Relax registers.
* gcc.target/arm/mve/pr108177-9.c: Relax registers.
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-05-18 10:44 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-05-02 12:11 [Bug target/109697] New: arm: lack of MVE instruction costing causing worse codegen on a vec_duplicate stammark at gcc dot gnu.org
2023-05-18 10:01 ` [Bug target/109697] " cvs-commit at gcc dot gnu.org
2023-05-18 10:13 ` cvs-commit at gcc dot gnu.org
2023-05-18 10:44 ` cvs-commit at gcc dot gnu.org
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).