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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/109725] [14 Regression] ICE: RTL check: expected code 'const_int', have 'reg' in riscv_print_operand, at config/riscv/riscv.cc:4430
Date: Thu, 04 May 2023 04:27:34 +0000 [thread overview]
Message-ID: <bug-109725-4-Pf31XZvinW@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-109725-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109725
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Last reconfirmed| |2023-05-04
Status|UNCONFIRMED |NEW
Target Milestone|--- |14.0
Ever confirmed|0 |1
Keywords| |ice-checking
--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Yes this is bad coding:
static void
riscv_print_operand (FILE *file, rtx op, int letter)
{
/* `~` does not take an operand so op will be null
Check for before accessing op.
*/
if (letter == '~')
{
if (TARGET_64BIT)
fputc('w', file);
return;
}
machine_mode mode = GET_MODE (op);
enum rtx_code code = GET_CODE (op);
const enum memmodel model = memmodel_base (INTVAL (op));
model should only be defined where it is used rather than in the top.
next prev parent reply other threads:[~2023-05-04 4:27 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-04 4:10 [Bug target/109725] New: " zsojka at seznam dot cz
2023-05-04 4:27 ` pinskia at gcc dot gnu.org [this message]
2023-06-07 17:38 ` [Bug target/109725] " cvs-commit at gcc dot gnu.org
2023-06-09 17:36 ` dimitar at gcc dot gnu.org
2023-08-30 4:20 ` xuli1 at eswincomputing dot com
2023-08-30 4:32 ` xuli1 at eswincomputing dot com
2023-08-30 4:41 ` kito at gcc dot gnu.org
2023-08-30 5:31 ` cvs-commit at gcc dot gnu.org
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