[Bug middle-end/109907] Missed optimization for bit extraction (uses shift instead of single bit-test)

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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907

--- Comment #30 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Georg-Johann Lay <gjl@gcc.gnu.org>:

https://gcc.gnu.org/g:20643513b8dd34c07f2b0fccf119153a30735f66

commit r14-1694-g20643513b8dd34c07f2b0fccf119153a30735f66
Author: Georg-Johann Lay <avr@gjlay.de>
Date:   Sat Jun 10 23:21:13 2023 +0200

    target/19907: Overhaul bit extractions.

    o Logical right shift that shifts the MSB to position 0 can be performed in
      such a way that the input operand constraint can be relaxed from "0" to
"r".
      This results in less register pressure.  Moreover, no scratch register is
      required in that case.

    o The deprecated "extzv" pattern is replaced by "extzv<mode>" that allows
      inputs of scalar integer modes of different sizes (1 up to 4 bytes).

    o Existing patterns are adjusted to the more generic "extzv<mode>" pattern.
      Some patterns are added as the middle-end has been reworked to spot
      more bit-extraction opportunities.

    o A C function is used to print the asm for bit extractions, which is more
      convenient for complex output logic.

    The generated code is still not optimal because RTL optimizers might still
    prefer arithmetic like shift over bit-extractions.  For test cases see
    also PR36884 and PR55181.

    gcc/
            PR target/109907
            * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
            (MSB, SIZE): New mode attributes.
            (any_shift): New code iterator.
            (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
            (*lshr<mode>3_const_split): Add constraint alternative for
            the case of shift-offset = MSB.  Ditch "length" attribute.
            (extzv<mode): New. replaces extzv.  Adjust following patterns.
            Use avr_out_extr, avr_out_extr_not to print asm.
            (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
            (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
            * config/avr/constraints.md (C15, C23, C31, Yil): New
            * config/avr/predicates.md (reg_or_low_io_operand)
            (const7_operand, reg_or_low_io_operand)
            (const15_operand, const_0_to_15_operand)
            (const23_operand, const_0_to_23_operand)
            (const31_operand, const_0_to_31_operand): New.
            * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
            * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
            (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
            MSB case to new insn constraint "r" for operands[1].
            (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
            Handle these cases.
            (avr_rtx_costs_1): Adjust cost for a new pattern.
    gcc/testsuite/
            PR target/109907
            * gcc.target/avr/pr109907.c: New test.
            * gcc.target/avr/torture/pr109907-1.c: New test.
            * gcc.target/avr/torture/pr109907-2.c: New test.