[Bug target/110665] New: RISC-V do not preserve vector registers in interrupt handler

[Bug target/110665] New: RISC-V do not preserve vector registers in interrupt handler

[lehua.ding at rivai dot ai]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110665

            Bug ID: 110665
           Summary: RISC-V do not preserve vector registers in interrupt
                    handler
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: lehua.ding at rivai dot ai
  Target Milestone: ---

When an interrupt handler uses vector registers or calls other functions, the
handler needs to preserve the content in vector registers like GP or FP
registers. Currently, the GCC fully ignores the existence of vector registers
for this case even using -march=rv64gcv option.

Issue on Compiler Explorer: https://godbolt.org/z/nTGzr4o5P

[Bug target/110665] RISC-V do not preserve vector registers in interrupt handler

[lehua.ding at rivai dot ai]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110665

--- Comment #1 from Lehua Ding <lehua.ding at rivai dot ai> ---
If it's a problem, I'm willing to fix it.

[Bug target/110665] RISC-V do not preserve vector registers in interrupt handler

[lehua.ding at rivai dot ai]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110665

--- Comment #2 from Lehua Ding <lehua.ding at rivai dot ai> ---
I just found the relevant specification and the specification seems to require
that the vector registers used be saved.

> The interrupt attribute specifies that a function is an interrupt handler.
> The compiler will save/restore all used registers in the prologue/epilogue
> regardless of the ABI, all used registers including floating point
> register/vector register if F extension/vector extension is enabled.

From
https://github.com/riscv-non-isa/riscv-c-api-doc/blob/master/riscv-c-api.md#__attribute__interrupt-__attribute__interruptuser-__attribute__interruptsupervisor-__attribute__interruptmachine

[Bug target/110665] RISC-V do not preserve vector registers in interrupt handler

[lehua.ding at rivai dot ai]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110665

--- Comment #3 from Lehua Ding <lehua.ding at rivai dot ai> ---
Fixed by the commit
https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=fdd59c0f73e9e681cd5f4d0eee2dd58d60d8dbe1

with compiler option --param=riscv-vector-abi.
Confirmed after support riscv-vector-abi in default.

[Bug target/110665] RISC-V do not preserve vector registers in interrupt handler

[lehua.ding at rivai dot ai]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110665

Lehua Ding <lehua.ding at rivai dot ai> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|---                         |FIXED

--- Comment #4 from Lehua Ding <lehua.ding at rivai dot ai> ---
Fixed on trunk with --param=riscv-vector-abi options