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From: "bergner at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/110741] vec_ternarylogic intrinsic generates incorrect code on POWER10 target when compiled with GCC
Date: Sat, 22 Jul 2023 15:48:21 +0000	[thread overview]
Message-ID: <bug-110741-4-luOaMfoXxH@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-110741-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110741

--- Comment #3 from Peter Bergner <bergner at gcc dot gnu.org> ---
(In reply to Kewen Lin from comment #2)
> It exposed one issue on xxeval output vsx operands' format, can be fixed
> with:
> 
> diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
> index 0c269e4e8d9..1a87f1c0b63 100644
> --- a/gcc/config/rs6000/vsx.md
> +++ b/gcc/config/rs6000/vsx.md
> @@ -6586,7 +6586,7 @@ (define_insn "xxeval"
>                        (match_operand:QI 4 "u8bit_cint_operand" "n")]
>                       UNSPEC_XXEVAL))]
>     "TARGET_POWER10"
> -   "xxeval %0,%1,%2,%3,%4"
> +   "xxeval %x0,%x1,%x2,%x3,%4"
>     [(set_attr "type" "vecperm")
>      (set_attr "prefixed" "yes")])

Good catch. I consider that an "obvious" fix.  Please check for needed
backports.

  parent reply	other threads:[~2023-07-22 15:48 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-19 14:03 [Bug target/110741] New: " john_platts at hotmail dot com
2023-07-21  7:45 ` [Bug target/110741] " linkw at gcc dot gnu.org
2023-07-21  7:55 ` linkw at gcc dot gnu.org
2023-07-22 15:48 ` bergner at gcc dot gnu.org [this message]
2023-07-26  8:44 ` cvs-commit at gcc dot gnu.org
2023-08-01  5:46 ` cvs-commit at gcc dot gnu.org
2023-08-01  5:46 ` cvs-commit at gcc dot gnu.org
2023-08-01  5:46 ` cvs-commit at gcc dot gnu.org
2023-08-01  5:48 ` linkw at gcc dot gnu.org

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