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From: "sainan+gcc.bugzilla at calamity dot gg" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug middle-end/110773] [Aarch64] crash (SIGBUS) due to atomic instructions on under-aligned memory
Date: Thu, 04 Apr 2024 18:01:17 +0000 [thread overview]
Message-ID: <bug-110773-4-aCHwUEUrtM@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-110773-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110773
--- Comment #9 from Sainan <sainan+gcc.bugzilla at calamity dot gg> ---
(In reply to Wilco from comment #8)
> So it's unaligned then, and that's not supported. And you're lucky your
> specific alignment happens to work on v8.4 cores - it would fail for other
> offsets.
I'd say unlucky rather because I was going crazy about not being able to
reproduce this on the Windows ARM machine.
prev parent reply other threads:[~2024-04-04 18:01 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-21 23:46 [Bug target/110773] New: " scw-gcc at google dot com
2023-07-22 0:02 ` [Bug middle-end/110773] " pinskia at gcc dot gnu.org
2023-09-07 14:38 ` wilco at gcc dot gnu.org
2024-04-04 10:44 ` sainan+gcc.bugzilla at calamity dot gg
2024-04-04 10:59 ` wilco at gcc dot gnu.org
2024-04-04 17:09 ` sainan+gcc.bugzilla at calamity dot gg
2024-04-04 17:25 ` wilco at gcc dot gnu.org
2024-04-04 17:45 ` sainan+gcc.bugzilla at calamity dot gg
2024-04-04 17:54 ` wilco at gcc dot gnu.org
2024-04-04 18:01 ` sainan+gcc.bugzilla at calamity dot gg [this message]
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