[Bug target/110784] New: bpf: make use of the V4 sign-extended move instructions

[Bug target/110784] New: bpf: make use of the V4 sign-extended move instructions

[jemarch at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110784

            Bug ID: 110784
           Summary: bpf: make use of the V4 sign-extended move
                    instructions
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: jemarch at gcc dot gnu.org
  Target Milestone: ---

The BPF V4 ISA introduces three new instructions to move 16-, 32- and 64-bit
signed values to 64-bit registers with sign extension.  We shall make GCC to
use these instructions whenever feasible/desirable, but only with -mcpu=v4 or
later.

[Bug target/110784] bpf: make use of the V4 sign-extended move instructions

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110784

--- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by David Faust <dfaust@gcc.gnu.org>:

https://gcc.gnu.org/g:14dab1a1bcc3f0315e33d166df06520fba409c9b

commit r14-2831-g14dab1a1bcc3f0315e33d166df06520fba409c9b
Author: David Faust <david.faust@oracle.com>
Date:   Thu Jul 27 13:55:44 2023 -0700

    bpf: ISA V4 sign-extending move and load insns [PR110782,PR110784]

    BPF ISA V4 introduces sign-extending move and load operations.  This
    patch makes the BPF backend generate those instructions, when enabled
    and useful.

    A new option, -m[no-]smov gates generation of these instructions, and is
    enabled by default for -mcpu=v4 and above.  Tests for the new
    instructions and documentation for the new options are included.

            PR target/110782
            PR target/110784

    gcc/

            * config/bpf/bpf.opt (msmov): New option.
            * config/bpf/bpf.cc (bpf_option_override): Handle it here.
            * config/bpf/bpf.md (*extendsidi2): New.
            (extendhidi2): New.
            (extendqidi2): New.
            (extendsisi2): New.
            (extendhisi2): New.
            (extendqisi2): New.
            * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
            (eBPF Options): Add -m[no-]smov.  Document that -mcpu=v4
            also enables -msmov.

    gcc/testsuite/

            * gcc.target/bpf/sload-1.c: New test.
            * gcc.target/bpf/sload-pseudoc-1.c: New test.
            * gcc.target/bpf/smov-1.c: New test.
            * gcc.target/bpf/smov-pseudoc-1.c: New test.

[Bug target/110784] bpf: make use of the V4 sign-extended move instructions

[jemarch at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110784

Jose E. Marchesi <jemarch at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|---                         |FIXED

--- Comment #2 from Jose E. Marchesi <jemarch at gcc dot gnu.org> ---
Fixed by the commit above.