[Bug middle-end/110964] New: RISC-V vector ICE in expand_cond_len_ternop

[Bug middle-end/110964] New: RISC-V vector ICE in expand_cond_len_ternop

[jeremy.bennett at embecosm dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110964

            Bug ID: 110964
           Summary: RISC-V vector ICE in expand_cond_len_ternop
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: middle-end
          Assignee: unassigned at gcc dot gnu.org
          Reporter: jeremy.bennett at embecosm dot com
  Target Milestone: ---

Created attachment 55713
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=55713&action=edit
C source code of the bug reproducer

The following code (testcase.c) causes an ICE when using RISC-V vector as
target.

int *a;
long b, c;

int d ()
{
  const int e;
  for (; a < e; a++)
    c += *a * b;
}

Compiled with:

riscv64-unknown-linux-gnu-gcc -march=rv64gcv -mabi=lp64d -c \
    -Ofast --param=riscv-autovec-preference=scalable testcase.c

Output is:

testcase.c: In function 'd':
testcase.c:7:12: warning: comparison between pointer and integer
    7 |   for (; a < e; a++)
      |            ^
during RTL pass: expand
testcase.c:8:7: internal compiler error: in expand_cond_len_ternop, at
config/riscv/riscv-v.cc:3579
    8 |     c += *a * b;
      |       ^~
0x93b0f3 riscv_vector::expand_cond_len_ternop(unsigned int, rtx_def**)
        /home/jeremy/gittrees/mustang/gcc/gcc/config/riscv/riscv-v.cc:3579
0x1be5b61 gen_cond_len_fmarvvm1di(rtx_def*, rtx_def*, rtx_def*, rtx_def*,
rtx_def*, rtx_def*, rtx_def*, rtx_def*)
        /home/jeremy/gittrees/mustang/gcc/gcc/config/riscv/autovec.md:1644
0xf41dd2 rtx_insn* insn_gen_fn::operator()<rtx_def*, rtx_def*, rtx_def*,
rtx_def*, rtx_def*, rtx_def*, rtx_def*, rtx_def*>(rtx_def*, rtx_def*, rtx_def*,
rtx_def*, rtx_def*, rtx_def*, rtx_def*, rtx_def*) const
        /home/jeremy/gittrees/mustang/gcc/gcc/recog.h:411
0xf41dd2 maybe_gen_insn(insn_code, unsigned int, expand_operand*)
        /home/jeremy/gittrees/mustang/gcc/gcc/optabs.cc:8237
0xf463cc maybe_expand_insn(insn_code, unsigned int, expand_operand*)
        /home/jeremy/gittrees/mustang/gcc/gcc/optabs.cc:8265
0xf463cc expand_insn(insn_code, unsigned int, expand_operand*)
        /home/jeremy/gittrees/mustang/gcc/gcc/optabs.cc:8296
0xdc6de0 expand_fn_using_insn
        /home/jeremy/gittrees/mustang/gcc/gcc/internal-fn.cc:255
0xb72dbf expand_call_stmt
        /home/jeremy/gittrees/mustang/gcc/gcc/cfgexpand.cc:2737
0xb72dbf expand_gimple_stmt_1
        /home/jeremy/gittrees/mustang/gcc/gcc/cfgexpand.cc:3880
0xb72dbf expand_gimple_stmt
        /home/jeremy/gittrees/mustang/gcc/gcc/cfgexpand.cc:4044
0xb77bc6 expand_gimple_basic_block
        /home/jeremy/gittrees/mustang/gcc/gcc/cfgexpand.cc:6096
0xb79576 execute
        /home/jeremy/gittrees/mustang/gcc/gcc/cfgexpand.cc:6831
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.

System information
------------------

Using built-in specs.
COLLECT_GCC=riscv64-unknown-linux-gnu-gcc
COLLECT_LTO_WRAPPER=/home/jeremy/gittrees/mustang/install/libexec/gcc/riscv64-unknown-linux-gnu/14.0.0/lto-wrapper
Target: riscv64-unknown-linux-gnu
Configured with: /home/jeremy/gittrees/mustang/gcc/configure
--target=riscv64-unknown-linux-gnu
--prefix=/home/jeremy/gittrees/mustang/install
--with-sysroot=/home/jeremy/gittrees/mustang/install/sysroot
--with-pkgversion=g5c27c911f6b --with-system-zlib --enable-shared --enable-tls
--enable-languages=c,c++,fortran --disable-libmudflap --disable-libssp
--disable-libquadmath --disable-libsanitizer --disable-nls --disable-bootstrap
--src=/home/jeremy/gittrees/mustang/gcc --enable-multilib --with-abi=lp64d
--with-arch=rv64gc --with-tune= --with-isa-spec=20191213 'CFLAGS_FOR_TARGET=-O2
   -mcmodel=medany' 'CXXFLAGS_FOR_TARGET=-O2    -mcmodel=medany'
Thread model: posix
Supported LTO compression algorithms: zlib
gcc version 14.0.0 20230809 (experimental) (g5c27c911f6b)

[Bug target/110964] RISC-V vector ICE in expand_cond_len_ternop

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110964

--- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <panli@gcc.gnu.org>:

https://gcc.gnu.org/g:887f13916b18f46b563d527ad5001c6384e44a60

commit r14-3123-g887f13916b18f46b563d527ad5001c6384e44a60
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Thu Aug 10 17:21:46 2023 +0800

    RISC-V: Support TU for integer ternary OP[PR110964]

    PR target/110964

    gcc/ChangeLog:
            PR target/110964
            * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer
ternary.

    gcc/testsuite/ChangeLog:
            PR target/110964
            * gcc.target/riscv/rvv/autovec/pr110964.c: New test.

[Bug target/110964] RISC-V vector ICE in expand_cond_len_ternop

[jeremy.bennett at embecosm dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110964

Jeremy Bennett <jeremy.bennett at embecosm dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|UNCONFIRMED                 |RESOLVED

--- Comment #2 from Jeremy Bennett <jeremy.bennett at embecosm dot com> ---
Confirmed the patch resolves this issue.