public inbox for gcc-bugs@sourceware.org
help / color / mirror / Atom feed
* [Bug target/111119] New: maskload and maskstore for integer modes are oddly conditional on AVX2
@ 2023-08-23 12:29 rguenth at gcc dot gnu.org
2023-08-24 12:47 ` [Bug target/111119] " rguenth at gcc dot gnu.org
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: rguenth at gcc dot gnu.org @ 2023-08-23 12:29 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111119
Bug ID: 111119
Summary: maskload and maskstore for integer modes are oddly
conditional on AVX2
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: rguenth at gcc dot gnu.org
Target Milestone: ---
We have
(define_expand "maskload<mode><sseintvecmodelower>"
[(set (match_operand:V48_AVX2 0 "register_operand")
(unspec:V48_AVX2
[(match_operand:<sseintvecmode> 2 "register_operand")
(match_operand:V48_AVX2 1 "memory_operand")]
UNSPEC_MASKMOV))]
"TARGET_AVX")
and
(define_mode_iterator V48_AVX2
[V4SF V2DF
V8SF V4DF
(V4SI "TARGET_AVX2") (V2DI "TARGET_AVX2")
(V8SI "TARGET_AVX2") (V4DI "TARGET_AVX2")])
so for example maskloadv4siv4si is disabled with just -mavx while the actual
instruction can operate just fine on SImode sized data by pretending its
SFmode.
check_effective_target_vect_masked_load is conditional on AVX, not AVX2.
With just AVX we can still use SSE2 vectorization for integer operations using
masked loads/stores from AVX.
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Bug target/111119] maskload and maskstore for integer modes are oddly conditional on AVX2
2023-08-23 12:29 [Bug target/111119] New: maskload and maskstore for integer modes are oddly conditional on AVX2 rguenth at gcc dot gnu.org
@ 2023-08-24 12:47 ` rguenth at gcc dot gnu.org
2023-08-25 0:36 ` crazylht at gmail dot com
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: rguenth at gcc dot gnu.org @ 2023-08-24 12:47 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111119
--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
See https://gcc.gnu.org/pipermail/gcc-patches/2021-August/577577.html for the
attempt to move x86 to the internal-fn representation
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Bug target/111119] maskload and maskstore for integer modes are oddly conditional on AVX2
2023-08-23 12:29 [Bug target/111119] New: maskload and maskstore for integer modes are oddly conditional on AVX2 rguenth at gcc dot gnu.org
2023-08-24 12:47 ` [Bug target/111119] " rguenth at gcc dot gnu.org
@ 2023-08-25 0:36 ` crazylht at gmail dot com
2023-08-25 0:46 ` crazylht at gmail dot com
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: crazylht at gmail dot com @ 2023-08-25 0:36 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111119
Hongtao.liu <crazylht at gmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |crazylht at gmail dot com
--- Comment #2 from Hongtao.liu <crazylht at gmail dot com> ---
(In reply to Richard Biener from comment #0)
> We have
>
> (define_expand "maskload<mode><sseintvecmodelower>"
> [(set (match_operand:V48_AVX2 0 "register_operand")
> (unspec:V48_AVX2
> [(match_operand:<sseintvecmode> 2 "register_operand")
> (match_operand:V48_AVX2 1 "memory_operand")]
> UNSPEC_MASKMOV))]
> "TARGET_AVX")
>
> and
>
> (define_mode_iterator V48_AVX2
> [V4SF V2DF
> V8SF V4DF
> (V4SI "TARGET_AVX2") (V2DI "TARGET_AVX2")
> (V8SI "TARGET_AVX2") (V4DI "TARGET_AVX2")])
>
> so for example maskloadv4siv4si is disabled with just -mavx while the actual
> instruction can operate just fine on SImode sized data by pretending its
> SFmode.
>
> check_effective_target_vect_masked_load is conditional on AVX, not AVX2.
>
> With just AVX we can still use SSE2 vectorization for integer operations
> using
> masked loads/stores from AVX.
I see, we can add an alternative like "noavx2,avx2" to generate vmaskmovps/pd
when avx2 is not available for integer.
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Bug target/111119] maskload and maskstore for integer modes are oddly conditional on AVX2
2023-08-23 12:29 [Bug target/111119] New: maskload and maskstore for integer modes are oddly conditional on AVX2 rguenth at gcc dot gnu.org
2023-08-24 12:47 ` [Bug target/111119] " rguenth at gcc dot gnu.org
2023-08-25 0:36 ` crazylht at gmail dot com
@ 2023-08-25 0:46 ` crazylht at gmail dot com
2023-08-28 1:26 ` cvs-commit at gcc dot gnu.org
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: crazylht at gmail dot com @ 2023-08-25 0:46 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111119
--- Comment #3 from Hongtao.liu <crazylht at gmail dot com> ---
> I see, we can add an alternative like "noavx2,avx2" to generate
> vmaskmovps/pd when avx2 is not available for integer.
It's better to change assmeble output as
27423 if (TARGET_AVX2)
27424 return "v<sseintprefix>maskmov<ssemodesuffix>\t{%1, %2, %0|%0, %2,
%1}";
27425 else
27426 return "vmaskmov<ssefltmodesuffix>\t{%1, %2, %0|%0, %2, %1}";
No need to add alternative.
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Bug target/111119] maskload and maskstore for integer modes are oddly conditional on AVX2
2023-08-23 12:29 [Bug target/111119] New: maskload and maskstore for integer modes are oddly conditional on AVX2 rguenth at gcc dot gnu.org
` (2 preceding siblings ...)
2023-08-25 0:46 ` crazylht at gmail dot com
@ 2023-08-28 1:26 ` cvs-commit at gcc dot gnu.org
2023-08-28 1:26 ` crazylht at gmail dot com
2023-08-29 12:12 ` rguenth at gcc dot gnu.org
5 siblings, 0 replies; 7+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2023-08-28 1:26 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111119
--- Comment #4 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by hongtao Liu <liuhongt@gcc.gnu.org>:
https://gcc.gnu.org/g:945217845db7edb499d66ac56480ce569002b83e
commit r14-3509-g945217845db7edb499d66ac56480ce569002b83e
Author: liuhongt <hongtao.liu@intel.com>
Date: Fri Aug 25 08:46:26 2023 +0800
Use vmaskmov{ps,pd} for VI48_128_256 when TARGET_AVX2 is not available.
vpmaskmov{d,q} is available for TARGET_AVX2, vmaskmov{ps,ps} is
available for TARGET_AVX, w/o TARGET_AVX2, we can use vmaskmov{ps,pd}
for VI48_128_256
gcc/ChangeLog:
PR target/111119
* config/i386/sse.md (V48_AVX2): Rename to ..
(V48_128_256): .. this.
(ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
(<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
integral modes when TARGET_AVX2 is not available.
(<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
(maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
V48_128_256.
(maskstore<mode><sseintvecmodelower>): Ditto.
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Bug target/111119] maskload and maskstore for integer modes are oddly conditional on AVX2
2023-08-23 12:29 [Bug target/111119] New: maskload and maskstore for integer modes are oddly conditional on AVX2 rguenth at gcc dot gnu.org
` (3 preceding siblings ...)
2023-08-28 1:26 ` cvs-commit at gcc dot gnu.org
@ 2023-08-28 1:26 ` crazylht at gmail dot com
2023-08-29 12:12 ` rguenth at gcc dot gnu.org
5 siblings, 0 replies; 7+ messages in thread
From: crazylht at gmail dot com @ 2023-08-28 1:26 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111119
--- Comment #5 from Hongtao.liu <crazylht at gmail dot com> ---
Fixed in GCC14.
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Bug target/111119] maskload and maskstore for integer modes are oddly conditional on AVX2
2023-08-23 12:29 [Bug target/111119] New: maskload and maskstore for integer modes are oddly conditional on AVX2 rguenth at gcc dot gnu.org
` (4 preceding siblings ...)
2023-08-28 1:26 ` crazylht at gmail dot com
@ 2023-08-29 12:12 ` rguenth at gcc dot gnu.org
5 siblings, 0 replies; 7+ messages in thread
From: rguenth at gcc dot gnu.org @ 2023-08-29 12:12 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111119
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |RESOLVED
Target Milestone|--- |14.0
Resolution|--- |FIXED
--- Comment #6 from Richard Biener <rguenth at gcc dot gnu.org> ---
.
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-08-29 12:12 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-08-23 12:29 [Bug target/111119] New: maskload and maskstore for integer modes are oddly conditional on AVX2 rguenth at gcc dot gnu.org
2023-08-24 12:47 ` [Bug target/111119] " rguenth at gcc dot gnu.org
2023-08-25 0:36 ` crazylht at gmail dot com
2023-08-25 0:46 ` crazylht at gmail dot com
2023-08-28 1:26 ` cvs-commit at gcc dot gnu.org
2023-08-28 1:26 ` crazylht at gmail dot com
2023-08-29 12:12 ` rguenth at gcc dot gnu.org
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).