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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/112597] RISC-V regression testsuite errors with rv64gcv_zvl256b Date: Mon, 20 Nov 2023 13:54:50 +0000 [thread overview] Message-ID: <bug-112597-4-qXoS1tUe7y@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-112597-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112597 --- Comment #3 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Pan Li <panli@gcc.gnu.org>: https://gcc.gnu.org/g:a27f587816b6c3b8e46e4e46777abdc915ae00aa commit r14-5624-ga27f587816b6c3b8e46e4e46777abdc915ae00aa Author: Juzhe-Zhong <juzhe.zhong@rivai.ai> Date: Mon Nov 20 21:11:14 2023 +0800 RISC-V: Fix intermediate mode on slide1 instruction for SEW64 on RV32 This bug was discovered on PR112597, with -march=rv32gcv_zvl256b --param=riscv-autovec-preference=fixed-vlmax ICE: bug.c:10:1: error: unrecognizable insn: 10 | } | ^ (insn 10 9 11 2 (set (reg:V4SI 140) (unspec:V4SI [ (unspec:V4BI [ (const_vector:V4BI [ (const_int 1 [0x1]) repeated x4 ]) (const_int 4 [0x4]) (const_int 2 [0x2]) repeated x3 (reg:SI 66 vl) (reg:SI 67 vtype) ] UNSPEC_VPREDICATE) (unspec:V4SI [ (reg:SI 0 zero) ] UNSPEC_VUNDEF) (subreg:V4SI (reg:V2DI 138 [ v ]) 0) (subreg:SI (reg/v:DI 136 [ b ]) 0) ] UNSPEC_VSLIDE1DOWN)) "bug.c":8:10 -1 (nil)) The rootcase is we don't enable V4SImode, instead, we already have RVVMF2SI which is totally same as V4SI on -march=rv32gcv_zvl256 + --param=riscv-autovec-preference=fixed-vlmax. The attribute VDEMODE map to V4SI is incorrect, we remove attributes and use get_vector_mode to get right mode. PR target/112597 gcc/ChangeLog: * config/riscv/vector-iterators.md: Remove VDEMOTE and VMDEMOTE. * config/riscv/vector.md: Fix slide1 intermediate mode bug. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr112597-1.c: New test.
next prev parent reply other threads:[~2023-11-20 13:54 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-11-17 21:15 [Bug target/112597] New: " patrick at rivosinc dot com 2023-11-17 21:21 ` [Bug target/112597] " patrick at rivosinc dot com 2023-11-20 10:16 ` juzhe.zhong at rivai dot ai 2023-11-20 13:54 ` cvs-commit at gcc dot gnu.org [this message] 2023-11-21 2:41 ` juzhe.zhong at rivai dot ai 2023-11-21 17:36 ` patrick at rivosinc dot com 2023-11-21 17:39 ` patrick at rivosinc dot com 2023-11-21 22:10 ` juzhe.zhong at rivai dot ai 2023-11-21 22:38 ` patrick at rivosinc dot com 2023-11-27 17:34 ` patrick at rivosinc dot com 2023-11-27 17:39 ` patrick at rivosinc dot com 2023-12-04 21:30 ` patrick at rivosinc dot com 2023-12-11 22:04 ` patrick at rivosinc dot com 2024-01-24 23:53 ` patrick at rivosinc dot com
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