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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/112817] RISC-V: RVV: provide a preprocessor macro for VLS codegen
Date: Fri, 01 Dec 2023 21:53:46 +0000	[thread overview]
Message-ID: <bug-112817-4-VGzBkeOFqk@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-112817-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112817

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
>gcc doesn't, which is a bit of pain for downstream projects such as xsimd.

Does it even make sense to define this? Projects like xsimd seems to be good
for fixed length SIMD but it seems to have a broken idea for non-fixed length
SIMD like SVE and RVV. Would it better to have xsimd provide better interfaces
instead for non-fixed length vectors and not provide a fixed length API at all?

  parent reply	other threads:[~2023-12-01 21:53 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-01 21:50 [Bug target/112817] New: " vineetg at gcc dot gnu.org
2023-12-01 21:51 ` [Bug target/112817] " pinskia at gcc dot gnu.org
2023-12-01 21:53 ` pinskia at gcc dot gnu.org [this message]
2023-12-01 21:55 ` pinskia at gcc dot gnu.org
2023-12-01 21:57 ` vineetg at gcc dot gnu.org
2023-12-01 22:01 ` pinskia at gcc dot gnu.org
2023-12-01 22:31 ` juzhe.zhong at rivai dot ai
2023-12-01 23:22 ` vineetg at gcc dot gnu.org
2023-12-01 23:24 ` juzhe.zhong at rivai dot ai
2023-12-05 15:59 ` kito at gcc dot gnu.org
2024-01-08 23:18 ` vineetg at gcc dot gnu.org
2024-01-08 23:21 ` [Bug target/112817] RISC-V: RVV: provide attribute riscv_rvv_vector_bits " juzhe.zhong at rivai dot ai
2024-01-08 23:41 ` pinskia at gcc dot gnu.org
2024-01-10 11:35 ` juzhe.zhong at rivai dot ai
2024-01-11 16:15 ` vineetg at gcc dot gnu.org
2024-03-06 18:23 ` vineetg at gcc dot gnu.org
2024-03-06 18:25 ` vineetg at gcc dot gnu.org

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