[Bug target/112932] New: [14] RISC-V rv64gcv_zvl256b vector: Incorrect behavior with nested loop array writing

[Bug target/112932] New: [14] RISC-V rv64gcv_zvl256b vector: Incorrect behavior with nested loop array writing

[patrick at rivosinc dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112932

            Bug ID: 112932
           Summary: [14] RISC-V rv64gcv_zvl256b vector: Incorrect behavior
                    with nested loop array writing
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: patrick at rivosinc dot com
  Target Milestone: ---

Testcase:
int printf(char *, ...);
int a, j, n, b, c, o, d, g, h;
int e[8];
long f[8][6];
void l() {
  o = -27;
  for (; o; o++) {
    *e = 1;
    if (a >= n) {
      d = 0;
      for (; d <= 7; d++)
        e[d] = c;
    }
  }
  j = 0;
  for (; j < 8; j++) {
    g = 0;
    for (; g < 2; g++) {
      h = 1;
      for (; h < 3; h++)
        f[j][g * 2 + h] = 1;
    }
  }
  unsigned long *m = &f[1][1];
  *m = 0;
}
int main() {
  l();
  b = f[0][1];
  printf("b: %d\n", b);
}

Commands:
rv64gc:
> /scratch/tc-testing/tc-dec-8-trunk/build-rv64gcv/bin/riscv64-unknown-linux-gnu-gcc -march=rv64gc -mabi=lp64d -O3 red.c -o rv64gc.out
> QEMU_CPU=rv64,vlen=256,v=true,vext_spec=v1.0 /scratch/tc-testing/tc-dec-8-trunk/build-rv64gcv/bin/qemu-riscv64 rv64gc.out
f[0][1]: 1
f[0][2]: 1
f[0][3]: 1
f[0][4]: 1
f[1][1]: 2
f[1][2]: 1
f[1][3]: 1
f[1][4]: 1
f[2][1]: 1
f[2][2]: 1
f[2][3]: 1
f[2][4]: 1
f[3][1]: 1
f[3][2]: 1
f[3][3]: 1
f[3][4]: 1
f[4][1]: 1
f[4][2]: 1
f[4][3]: 1
f[4][4]: 1
f[5][1]: 1
f[5][2]: 1
f[5][3]: 1
f[5][4]: 1
f[6][1]: 1
f[6][2]: 1
f[6][3]: 1
f[6][4]: 1
f[7][1]: 1
f[7][2]: 1
f[7][3]: 1
f[7][4]: 1

rv64gcv_zvl256b:
> /scratch/tc-testing/tc-dec-8-trunk/build-rv64gcv/bin/riscv64-unknown-linux-gnu-gcc -march=rv64gcv_zvl256b -mabi=lp64d -O3 red.c -o rv64gcv.out
> QEMU_CPU=rv64,vlen=256,v=true,vext_spec=v1.0 /scratch/tc-testing/tc-dec-8-trunk/build-rv64gcv/bin/qemu-riscv64 rv64gcv.out
f[0][1]: 0
f[0][2]: 0
f[0][3]: 0
f[0][4]: 0
f[1][1]: 2
f[1][2]: 1
f[1][3]: 1
f[1][4]: 1
f[2][1]: 0
f[2][2]: 0
f[2][3]: 0
f[2][4]: 0
f[3][1]: 0
f[3][2]: 0
f[3][3]: 0
f[3][4]: 0
f[4][1]: 0
f[4][2]: 0
f[4][3]: 0
f[4][4]: 0
f[5][1]: 0
f[5][2]: 0
f[5][3]: 0
f[5][4]: 0
f[6][1]: 0
f[6][2]: 0
f[6][3]: 0
f[6][4]: 0
f[7][1]: 0
f[7][2]: 0
f[7][3]: 0
f[7][4]: 0

This issue does not occur when compiled with vlenb=128 (rv64gcv).

Basic analysis:
The print loop is copied from the second set of loops in l().

All of these elements should equal 1 except for f[1][1] since it's set
to 2 via *m.

rv64gcv incorrectly reports that some of these elements are set to 0.

[Bug target/112932] [14] RISC-V rv64gcv_zvl256b vector: Incorrect behavior with nested loop array writing

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112932

--- Comment #1 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <panli@gcc.gnu.org>:

https://gcc.gnu.org/g:9363d91956931bb28735bed97035b9ec965c850f

commit r14-6354-g9363d91956931bb28735bed97035b9ec965c850f
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Sat Dec 9 16:31:53 2023 +0800

    RISC-V: Fix VLS mode movmiaslign bug

    PR112932 let me notice there is a bug of current VLS mode misalign pattern.
    Adapt it same as VLA mode.

    Commited as it is obvious fix.

            PR target/112932

    gcc/ChangeLog:

            * config/riscv/vector.md (movmisalign<mode>): Fix VLSmode bugs.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/autovec/vls/misalign-1.c: Ditto.
            * gcc.target/riscv/rvv/autovec/pr112932.c: New test.

[Bug target/112932] [14] RISC-V rv64gcv_zvl256b vector: Incorrect behavior with nested loop array writing

[patrick at rivosinc dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112932

Patrick O'Neill <patrick at rivosinc dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|UNCONFIRMED                 |RESOLVED

--- Comment #2 from Patrick O'Neill <patrick at rivosinc dot com> ---
Confirmed fixed. Thanks!