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From: "gkm at rivosinc dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/113010] [RISCV] sign-extension lost in comparison with constant embedded in comma-op expression
Date: Thu, 11 Jan 2024 02:45:31 +0000	[thread overview]
Message-ID: <bug-113010-4-IrWFBzL8al@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-113010-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113010

--- Comment #6 from Greg McGary <gkm at rivosinc dot com> ---
(In reply to Andrew Pinski from comment #5)
> (In reply to Andrew Pinski from comment #4)
> > (In reply to Greg McGary from comment #3)
> > > This fixes it, though I would like second look from someone more familiar
> > > with the combiner:
> > 
> > I almost sure this is still an issue with WORD_REGISTER_OPERATIONS .
> 
> That is this is missing that check:
> 
> ```
>   /* Convert sign extension to zero extension, if we know that the high
>      bit is not set, as this is easier to optimize.  It will be converted
>      back to cheaper alternative in make_extraction.  */
>   if (GET_CODE (x) == SIGN_EXTEND
>       && HWI_COMPUTABLE_MODE_P (mode)
>       && ((nonzero_bits (XEXP (x, 0), inner_mode)
>            & ~(((unsigned HOST_WIDE_INT) GET_MODE_MASK (inner_mode)) >> 1))
>           == 0))
> 
> ```
> 
> Should most likely need the same check as what was added in r14-6806 . And
> yes it a similar bug dealing with WORD_REGISTER_OPERATIONS  which is why I
> thought it was the same.

I agree that it pertains to WORD_REGISTER_OPERATIONS. However, the check needs
to happen. The test for converting SIGN_EXTEND to ZERO_EXTEND is false for
MEM_P (x) already. The erroneous conversion to SUBREG happens farther down,
here:

```
  modewidth = GET_MODE_PRECISION (mode);
  if (modewidth >= pos + len)
    {
=>    tem = gen_lowpart (mode, XEXP (x, 0));
      if (!tem || GET_CODE (tem) == CLOBBER)
        return x;
      tem = simplify_shift_const (NULL_RTX, ASHIFT, mode,
                                  tem, modewidth - pos - len);
      tem = simplify_shift_const (NULL_RTX, unsignedp ? LSHIFTRT : ASHIFTRT,
                                  mode, tem, modewidth - len);
    }
```

This fix honors WORD_REGISTER_OPERATIONS, and adds a test:

```
diff --git a/gcc/combine.cc b/gcc/combine.cc
index 812553c091e..ba587184dfc 100644
--- a/gcc/combine.cc
+++ b/gcc/combine.cc
@@ -7208,6 +7208,11 @@ expand_compound_operation (rtx x)
       if (len == 0)
        return x;

+      /* Sign-extending loads can never be simplified at compile time.  */
+      if (WORD_REGISTER_OPERATIONS && MEM_P (XEXP (x, 0))
+   && load_extend_op (inner_mode) == SIGN_EXTEND)
+ return x;
+
       break;

     case ZERO_EXTRACT:
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr113010.c
b/gcc/testsuite/gcc.c-torture/execute/pr113010.c
new file mode 100644
index 00000000000..a95c613c1df
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr113010.c
@@ -0,0 +1,9 @@
+int minus_1 = -1;
+
+int
+main ()
+{
+  if ((0, 0xfffffffful) >= minus_1)
+    __builtin_abort ();
+  return 0;
+}
```

  parent reply	other threads:[~2024-01-11  2:45 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-13 21:55 [Bug target/113010] New: " gkm at rivosinc dot com
2023-12-13 22:06 ` [Bug target/113010] " pinskia at gcc dot gnu.org
2024-01-04  1:55 ` patrick at rivosinc dot com
2024-01-09 21:56 ` gkm at rivosinc dot com
2024-01-09 22:05 ` pinskia at gcc dot gnu.org
2024-01-09 22:12 ` pinskia at gcc dot gnu.org
2024-01-09 22:12 ` pinskia at gcc dot gnu.org
2024-01-11  2:45 ` gkm at rivosinc dot com [this message]
2024-01-11  2:50 ` gkm at rivosinc dot com
2024-01-24 21:33 ` patrick at rivosinc dot com
2024-01-24 21:47 ` pinskia at gcc dot gnu.org
2024-03-03 21:50 ` cvs-commit at gcc dot gnu.org
2024-03-03 21:53 ` law at gcc dot gnu.org
2024-03-04 18:24 ` cvs-commit at gcc dot gnu.org

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