[Bug target/113033] New: GCC 14 (20231203 snapshot) ICE when building LSX vector rotate code on LoongArch

[Bug target/113033] New: GCC 14 (20231203 snapshot) ICE when building LSX vector rotate code on LoongArch

[c at jia dot je]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113033

            Bug ID: 113033
           Summary: GCC 14 (20231203 snapshot) ICE when building LSX
                    vector rotate code on LoongArch
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: c at jia dot je
  Target Milestone: ---

Source code:

```
#include <lsxintrin.h>

v2u64 test(v2u64 a, int imm) {
  return (a << (imm & 63)) | (a >> (64 - (imm & 63)));
}

```

Command line to reproduce:

```
gcc-14 -mlsx -c test.c
```

Error message:

```
test.c: In function ‘test’:
test.c:5:1: error: unrecognizable insn:
    5 | }
      | ^
(insn 16 15 17 2 (set (reg:DI 92)
        (and:DI (neg:DI (reg:DI 80 [ _1 ]))
            (const_int 63 [0x3f]))) "test.c":4:28 -1
     (nil))
during RTL pass: vregs
test.c:5:1: internal compiler error: in extract_insn, at recog.cc:2804
0x5555591d419f internal_error(char const*, ...)
        ???:0
0x5555577b4d87 fancy_abort(char const*, int, char const*)
        ???:0
0x5555577998bb _fatal_insn(char const*, rtx_def const*, char const*, int, char
const*)
        ???:0
0x5555577998ef _fatal_insn_not_found(rtx_def const*, char const*, int, char
const*)
        ???:0
0x5555580704f7 extract_insn(rtx_insn*)
        ???:0
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.
See <https://bugs.gentoo.org/> for instructions.
```

[Bug target/113033] GCC 14 (20231203 snapshot) ICE when building LSX vector rotate code on LoongArch

[xry111 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113033

Xi Ruoyao <xry111 at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |chenglulu at loongson dot cn,
                   |                            |xen0n at gentoo dot org
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2023-12-16
             Status|UNCONFIRMED                 |NEW

--- Comment #1 from Xi Ruoyao <xry111 at gcc dot gnu.org> ---
Confirmed.

[Bug target/113033] GCC 14 (20231203 snapshot) ICE when building LSX vector rotate code on LoongArch

[xry111 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113033

--- Comment #2 from Xi Ruoyao <xry111 at gcc dot gnu.org> ---
It looks like we are missing a force_reg () somewhere.

[Bug target/113033] GCC 14 (20231203 snapshot) ICE when building LSX vector rotate code on LoongArch

[xry111 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113033

--- Comment #3 from Xi Ruoyao <xry111 at gcc dot gnu.org> ---
(define_expand "vec_init<mode><unitmode>"
  [(match_operand:LSX 0 "register_operand")
   (match_operand:LSX 1 "")] 
  "ISA_HAS_LSX"
{
  loongarch_expand_vector_init (operands[0], operands[1]);
  DONE;
})

We need to add a predicate for operand 1...

[Bug target/113033] GCC 14 (20231203 snapshot) ICE when building LSX vector rotate code on LoongArch

[xry111 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113033

--- Comment #4 from Xi Ruoyao <xry111 at gcc dot gnu.org> ---
Strange... Most backends do not have predicate for op2 of vec_init but how do
they evade this issue?

[Bug middle-end/113033] GCC 14 (20231203 snapshot) ICE when building LSX vector rotate code on LoongArch

[xry111 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113033

Xi Ruoyao <xry111 at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
          Component|target                      |middle-end
                 CC|                            |jakub at gcc dot gnu.org

--- Comment #5 from Xi Ruoyao <xry111 at gcc dot gnu.org> ---
It looks like we should do:

diff --git a/gcc/expmed.cc b/gcc/expmed.cc
index b294eabb08d..b87e09a8a65 100644
--- a/gcc/expmed.cc
+++ b/gcc/expmed.cc
@@ -2628,9 +2628,7 @@ expand_shift_1 (enum tree_code code, machine_mode mode,
rtx shifted,
                  (mode, GET_MODE_BITSIZE (scalar_mode) - INTVAL (op1));
              else
                {
-                 other_amount
-                   = simplify_gen_unary (NEG, GET_MODE (op1),
-                                         op1, GET_MODE (op1));
+                 other_amount = negate_rtx (GET_MODE (op1), op1);
                  HOST_WIDE_INT mask = GET_MODE_PRECISION (scalar_mode) - 1;
                  other_amount
                    = simplify_gen_binary (AND, GET_MODE (op1), other_amount,

??

[Bug middle-end/113033] GCC 14 (20231203 snapshot) ICE when building LSX vector rotate code on LoongArch

[xry111 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113033

Xi Ruoyao <xry111 at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |missed-optimization

--- Comment #6 from Xi Ruoyao <xry111 at gcc dot gnu.org> ---
There is also a missed-optimization on LoongArch.  vrotlM3 should be expanded
to (rotatert X, (neg Y)) instead of two shifts and an ior.

[Bug middle-end/113033] GCC 14 (20231203 snapshot) ICE when building LSX vector rotate code on LoongArch

[xry111 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113033

Xi Ruoyao <xry111 at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                URL|                            |https://gcc.gnu.org/piperma
                   |                            |il/gcc-patches/2023-Decembe
                   |                            |r/640871.html
          Component|target                      |middle-end

--- Comment #7 from Xi Ruoyao <xry111 at gcc dot gnu.org> ---
Patch: https://gcc.gnu.org/pipermail/gcc-patches/2023-December/640871.html

I'm not convinced the ICE is a target issue.  The missed-optimization is a
target issue though.

[Bug target/113033] GCC 14 (20231203 snapshot) ICE when building LSX vector rotate code on LoongArch

[xry111 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113033

Xi Ruoyao <xry111 at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
          Component|middle-end                  |target

--- Comment #8 from Xi Ruoyao <xry111 at gcc dot gnu.org> ---
(In reply to Xi Ruoyao from comment #2)
> It looks like we are missing a force_reg () somewhere.

Per Jakub's review my first gut feeling seems actually correct...

[Bug target/113033] GCC 14 (20231203 snapshot) ICE when building LSX vector rotate code on LoongArch

[xry111 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113033

--- Comment #9 from Xi Ruoyao <xry111 at gcc dot gnu.org> ---
diff --git a/gcc/config/loongarch/loongarch.cc
b/gcc/config/loongarch/loongarch.cc
index 256fa7d048d..65a2915329e 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -10770,7 +10770,7 @@ loongarch_expand_vector_init_same (rtx target, rtx
vals, unsigned nvar)
          gcc_unreachable ();
        }
     }
-  temp = gen_reg_rtx (imode);
+
   if (imode == GET_MODE (same))
     temp2 = same;
   else if (GET_MODE_SIZE (imode) >= UNITS_PER_WORD)
@@ -10795,7 +10795,8 @@ loongarch_expand_vector_init_same (rtx target, rtx
vals, unsigned nvar)
       else
        temp2 = lowpart_subreg (imode, same, GET_MODE (same));
     }
-  emit_move_insn (temp, temp2);
+
+  temp = force_reg (imode, temp2);

   switch (vmode)
     {

I mistakenly thought force_reg is just creating an reg and moving into it (if
the operand is not already in reg) but I was wrong.

[Bug target/113033] GCC 14 (20231203 snapshot) ICE when building LSX vector rotate code on LoongArch

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113033

--- Comment #10 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Xi Ruoyao <xry111@gcc.gnu.org>:

https://gcc.gnu.org/g:c7eefea622e70bd63b0e00e896f67cf9ee9916bc

commit r14-6746-gc7eefea622e70bd63b0e00e896f67cf9ee9916bc
Author: Xi Ruoyao <xry111@xry111.site>
Date:   Tue Dec 19 04:48:03 2023 +0800

    LoongArch: Use force_reg instead of gen_reg_rtx + emit_move_insn in
vec_init expander [PR113033]

    Jakub says:

        Then that seems like a bug in the loongarch vec_init pattern(s).
        Those really don't have a predicate in any of the backends on the
        input operand, so they need to force_reg it if it is something it
        can't handle. I've looked e.g. at i386 vec_init and that is exactly
        what it does, see the various tests + force_reg calls in
        ix86_expand_vector_init*.

    So replace gen_reg_rtx + emit_move_insn with force_reg to fix PR 113033.

    gcc/ChangeLog:

            PR target/113033
            * config/loongarch/loongarch.cc
            (loongarch_expand_vector_init_same): Replace gen_reg_rtx +
            emit_move_insn with force_reg.
            (loongarch_expand_vector_init): Likewise.

    gcc/testsuite/ChangeLog:

            PR target/113033
            * gcc.target/loongarch/pr113033.c: New test.

[Bug target/113033] GCC 14 (20231203 snapshot) ICE when building LSX vector rotate code on LoongArch

[xry111 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113033

Xi Ruoyao <xry111 at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|NEW                         |RESOLVED

--- Comment #11 from Xi Ruoyao <xry111 at gcc dot gnu.org> ---
ICE fixed.  Missed-optimization is
https://gcc.gnu.org/pipermail/gcc-patches/2023-December/640872.html.

[Bug target/113033] GCC 14 (20231203 snapshot) ICE when building LSX vector rotate code on LoongArch

[xry111 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113033

--- Comment #12 from Xi Ruoyao <xry111 at gcc dot gnu.org> ---
Missed-optimization fixed at r14-6851.