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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/113087] [14] RISC-V rv64gcv vector: Runtime mismatch with rv64gc Date: Wed, 20 Dec 2023 23:06:08 +0000 [thread overview] Message-ID: <bug-113087-4-DNf1DSiFiD@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-113087-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113087 --- Comment #7 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Pan Li <panli@gcc.gnu.org>: https://gcc.gnu.org/g:d82bb518fa372cc30cc3352e0a124d0bd6deb36f commit r14-6760-gd82bb518fa372cc30cc3352e0a124d0bd6deb36f Author: Juzhe-Zhong <juzhe.zhong@rivai.ai> Date: Wed Dec 20 14:50:11 2023 +0800 RISC-V: Fix bug of VSETVL fusion This patch fixes bugs in the fusion of this following case: li a5,-1 vmv.s.x v0,a5 -> demand any non-zero AVL vsetvli a5, ... Incorrect fusion after VSETVL PASS: li a5,-1 vsetvli a5... vmv.s.x v0, a5 --> a5 is modified as incorrect value. We disallow this incorrect fusion above. Full coverage testing of RV64 and RV32 no regression. PR target/113087 gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc: Disallow fusion when VL modification pollutes non AVL use. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr113087-1.c: New test.
next prev parent reply other threads:[~2023-12-20 23:06 UTC|newest] Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-12-19 22:20 [Bug target/113087] New: " patrick at rivosinc dot com 2023-12-19 22:28 ` [Bug target/113087] " juzhe.zhong at rivai dot ai 2023-12-19 22:45 ` patrick at rivosinc dot com 2023-12-19 22:51 ` juzhe.zhong at rivai dot ai 2023-12-19 23:42 ` patrick at rivosinc dot com 2023-12-20 2:12 ` juzhe.zhong at rivai dot ai 2023-12-20 2:21 ` patrick at rivosinc dot com 2023-12-20 23:06 ` cvs-commit at gcc dot gnu.org [this message] 2023-12-20 23:06 ` cvs-commit at gcc dot gnu.org 2023-12-20 23:25 ` juzhe.zhong at rivai dot ai 2023-12-21 2:55 ` patrick at rivosinc dot com 2023-12-21 19:22 ` patrick at rivosinc dot com 2023-12-21 22:43 ` juzhe.zhong at rivai dot ai 2023-12-22 19:59 ` vineetg at gcc dot gnu.org 2023-12-22 21:04 ` vineetg at gcc dot gnu.org 2023-12-22 22:21 ` juzhe.zhong at rivai dot ai 2023-12-22 23:07 ` vineetg at gcc dot gnu.org 2023-12-22 23:10 ` juzhe.zhong at rivai dot ai 2023-12-22 23:12 ` vineetg at gcc dot gnu.org 2023-12-22 23:14 ` juzhe.zhong at rivai dot ai 2023-12-22 23:20 ` juzhe.zhong at rivai dot ai 2023-12-22 23:21 ` juzhe.zhong at rivai dot ai 2023-12-22 23:33 ` palmer at gcc dot gnu.org 2023-12-22 23:36 ` juzhe.zhong at rivai dot ai 2023-12-22 23:37 ` juzhe.zhong at rivai dot ai 2023-12-23 2:21 ` jiawei at iscas dot ac.cn 2023-12-25 2:39 ` juzhe.zhong at rivai dot ai 2024-01-04 17:12 ` patrick at rivosinc dot com 2024-01-04 22:31 ` juzhe.zhong at rivai dot ai 2024-01-09 1:34 ` pan2.li at intel dot com 2024-01-10 22:16 ` patrick at rivosinc dot com 2024-01-10 23:09 ` juzhe.zhong at rivai dot ai 2024-01-11 0:33 ` patrick at rivosinc dot com 2024-01-11 0:37 ` vineetg at gcc dot gnu.org 2024-01-11 1:13 ` juzhe.zhong at rivai dot ai 2024-01-11 1:14 ` juzhe.zhong at rivai dot ai 2024-01-15 11:11 ` juzhe.zhong at rivai dot ai 2024-01-22 13:42 ` rdapp at gcc dot gnu.org 2024-01-22 14:39 ` rdapp at gcc dot gnu.org 2024-01-24 1:07 ` patrick at rivosinc dot com 2024-01-24 1:08 ` patrick at rivosinc dot com 2024-01-24 7:24 ` juzhe.zhong at rivai dot ai 2024-01-24 7:48 ` patrick at rivosinc dot com 2024-01-24 21:41 ` patrick at rivosinc dot com 2024-01-24 22:29 ` juzhe.zhong at rivai dot ai
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