[Bug target/113087] [14] RISC-V rv64gcv vector: Runtime mismatch with rv64gc

["vineetg at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113087

--- Comment #16 from Vineet Gupta <vineetg at gcc dot gnu.org> ---
(In reply to JuzheZhong from comment #15)
> Currently, we don't have much run FAIL and ICE left in full coverage testing.
> 
> I suspect it is very corner case in SPEC.
> 
> You don't have to debug it. Just need to give me a preprocessed source file.
> 
> Like this:
> 
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110560
> 
> You can see google highway folks attachment is very big but I still can fix
> the issue as long as you can give me some sources that I can reproduce the
> issues.

As I mentioned already these are runtime failure mismatches, so we don't know
where the issue is and thus no reduced test case. 

FWIW I could/would have debugged gcc code it if I had a reduced test.

So we need to dig down into guts of the benchmark and see where the output is
generated, checkpoint and so on so forth etc.

The other approach is to try "defeature" autovec and see if can point to broad
areas (in backend/middle-end) where the issue could be.
e.g.
  - simple vs. lazy vsetvl
  - disabling reductions etc.

BTW I'm surprised you are not seeing these as there is nothing rivos specific
here. Are you running the full SPEC suite, including Fortran / Float workloads.