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* [Bug target/113209] New: [14] RISC-V rv64gcv_zvl256b vector: Runtime mismatch with rv64gc
@ 2024-01-02 21:48 patrick at rivosinc dot com
2024-01-04 0:33 ` [Bug target/113209] " cvs-commit at gcc dot gnu.org
2024-01-04 1:37 ` patrick at rivosinc dot com
0 siblings, 2 replies; 3+ messages in thread
From: patrick at rivosinc dot com @ 2024-01-02 21:48 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113209
Bug ID: 113209
Summary: [14] RISC-V rv64gcv_zvl256b vector: Runtime mismatch
with rv64gc
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: patrick at rivosinc dot com
Target Milestone: ---
Testcase:
int b, c, d, f, i, a;
int e[1] = {0};
int *g = e;
int *k = e;
int *z;
long h;
int j[5] = {0,0,0,0,0};
void n() {
if (c) {
int **l = &z;
*l = e;
while (d)
;
}
}
void o() {
for (; b < 5; b += a) {
n();
for (h = 0; h < 5; h++)
j[h] = 1;
int m = *e != *g;
a |= i <= m;
f = -12;
for (; f; f++)
if (*k)
break;
}
}
int main() {
o();
if (a == 1)
return 0;
else
return 1;
}
Commands:
> /scratch/tc-testing/tc-jan-1-trunk/build-rv64gcv/bin/riscv64-unknown-linux-gnu-gcc -march=rv64gcv_zvl256b -O3 red.c -o user-config.out
> QEMU_CPU=rv64,vlen=256,v=true,vext_spec=v1.0,Zve32f=true,Zve64f=true timeout --verbose -k 0.1 1 /scratch/tc-testing/tc-dec-22-trunk/build-rv64gcv/bin/qemu-riscv64 user-config.out
> echo $?
1
> /scratch/tc-testing/tc-jan-1-trunk/build-rv64gcv/bin/riscv64-unknown-linux-gnu-gcc -march=rv64gc -O3 red.c -o user-config.out
> QEMU_CPU=rv64,vlen=256,v=true,vext_spec=v1.0,Zve32f=true,Zve64f=true timeout --verbose -k 0.1 1 /scratch/tc-testing/tc-dec-22-trunk/build-rv64gcv/bin/qemu-riscv64 user-config.out
> echo $?
0
With a printf:
gcv_zvl256b
a = 9
gc
a = 1
Analysis:
Working backwards from a
a |= i <= m
Since true/false only evaluate to 1/0, 'a' should never be 9
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug target/113209] [14] RISC-V rv64gcv_zvl256b vector: Runtime mismatch with rv64gc
2024-01-02 21:48 [Bug target/113209] New: [14] RISC-V rv64gcv_zvl256b vector: Runtime mismatch with rv64gc patrick at rivosinc dot com
@ 2024-01-04 0:33 ` cvs-commit at gcc dot gnu.org
2024-01-04 1:37 ` patrick at rivosinc dot com
1 sibling, 0 replies; 3+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2024-01-04 0:33 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113209
--- Comment #1 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <panli@gcc.gnu.org>:
https://gcc.gnu.org/g:4a0a8dc1b88408222b88e10278017189f6144602
commit r14-6902-g4a0a8dc1b88408222b88e10278017189f6144602
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date: Thu Jan 4 06:38:43 2024 +0800
RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS]
As PR113206 and PR113209, the bugs happens on the following situation:
li a4,32
...
vsetvli zero,a4,e8,m8,ta,ma
...
slliw a4,a3,24
sraiw a4,a4,24
bge a3,a1,.L8
sb a4,%lo(e)(a0)
vsetvli zero,a4,e8,m8,ta,ma --> a4 is polluted value not the
expected "32".
...
.L7:
j .L7 ---> infinite loop.
The root cause is that infinite loop confuse earliest computation and let
earliest fusion
happens on unexpected place.
Disable blocks that belong to infinite loop to fix this bug since applying
ealiest LCM fusion
on infinite loop seems quite complicated and we don't see any benefits.
Note that disabling earliest fusion on infinite loops doesn't hurt the
vsetvli performance,
instead, it does improve codegen of some cases.
Tested on both RV32 and RV64 no regression.
PR target/113206
PR target/113209
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (invalid_opt_bb_p): New function.
(pre_vsetvl::compute_lcm_local_properties): Disable earliest fusion
on
blocks belong to infinite loop.
(pre_vsetvl::emit_vsetvl): Remove fake edges.
* config/riscv/t-riscv: Add a new include file.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/vsetvl/avl_single-23.c: Adapt test.
* gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c: Robostify test.
* gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/pr113206-1.c: New test.
* gcc.target/riscv/rvv/autovec/pr113206-2.c: New test.
* gcc.target/riscv/rvv/autovec/pr113209.c: New test.
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug target/113209] [14] RISC-V rv64gcv_zvl256b vector: Runtime mismatch with rv64gc
2024-01-02 21:48 [Bug target/113209] New: [14] RISC-V rv64gcv_zvl256b vector: Runtime mismatch with rv64gc patrick at rivosinc dot com
2024-01-04 0:33 ` [Bug target/113209] " cvs-commit at gcc dot gnu.org
@ 2024-01-04 1:37 ` patrick at rivosinc dot com
1 sibling, 0 replies; 3+ messages in thread
From: patrick at rivosinc dot com @ 2024-01-04 1:37 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113209
Patrick O'Neill <patrick at rivosinc dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |RESOLVED
Resolution|--- |FIXED
--- Comment #2 from Patrick O'Neill <patrick at rivosinc dot com> ---
Confirmed resolved.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2024-01-02 21:48 [Bug target/113209] New: [14] RISC-V rv64gcv_zvl256b vector: Runtime mismatch with rv64gc patrick at rivosinc dot com
2024-01-04 0:33 ` [Bug target/113209] " cvs-commit at gcc dot gnu.org
2024-01-04 1:37 ` patrick at rivosinc dot com
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