[Bug target/113328] New: Some fixed length vector constants can be generated using SVE index instruction

[Bug target/113328] New: Some fixed length vector constants can be generated using SVE index instruction

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113328

            Bug ID: 113328
           Summary: Some fixed length vector constants can be generated
                    using SVE index instruction
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Keywords: missed-optimization
          Severity: enhancement
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: pinskia at gcc dot gnu.org
  Target Milestone: ---
            Target: aarch64-linux-gnu

Take:
```
 int test(int array[4]);

 int foo(int value)
 {
   int array[4];

   for (int i = 0; i < 4; i++)
      array[i] = i;

   return test(array);
 }

```

With `-O3 -march=armv8.4-a+sve` this currently generates:
```
        stp     x29, x30, [sp, -32]!
        adrp    x0, .LC0
        mov     x29, sp
        ldr     q31, [x0, #:lo12:.LC0]
        add     x0, sp, 16
        str     q31, [sp, 16]
        bl      test
        ldp     x29, x30, [sp], 32
        ret
```


But we should be able to produce:
```
        stp     x29, x30, [sp, -32]!
        mov     x29, sp
        index   z31.s, #0, #1
        add     x0, sp, 16
        str     q31, [sp, 16]
        bl      test
        ldp     x29, x30, [sp], 32
        ret
```

I noticed that while looking into PR 113326.