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* [Bug middle-end/113354] New: Regression/14: unable to find a register to spill on mips
@ 2024-01-12 12:28 syq at gcc dot gnu.org
2024-01-12 14:02 ` [Bug middle-end/113354] " syq at gcc dot gnu.org
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: syq at gcc dot gnu.org @ 2024-01-12 12:28 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113354
Bug ID: 113354
Summary: Regression/14: unable to find a register to spill on
mips
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: middle-end
Assignee: unassigned at gcc dot gnu.org
Reporter: syq at gcc dot gnu.org
Target Milestone: ---
../../../libgfortran/generated/matmul_i4.c: In function ‘matmul_i4’:
../../../libgfortran/generated/matmul_i4.c:3006:1: error: unable to find a
register to spill
3006 | }
| ^
../../../libgfortran/generated/matmul_i4.c:3006:1: error: this is the insn:
(insn 1643 7974 7975 184 (parallel [
(set (reg/v:SI 2999 [orig:435 f34 ] [435])
(plus:SI (mult:SI (reg:SI 286 [ _332 ])
(reg:SI 289 [ _342 ]))
(reg/v:SI 3000 [orig:435 f34 ] [435])))
(clobber (reg:SI 2791 [2407]))
(clobber (reg:SI 2408))
]) "../../../libgfortran/generated/matmul_i4.c":2820:14 42
{*mul_acc_si}
(expr_list:REG_UNUSED (reg:SI 2408)
(expr_list:REG_UNUSED (reg:SI 2791 [2407])
(expr_list:REG_DEAD (reg/v:SI 3000 [orig:435 f34 ] [435])
(expr_list:REG_DEAD (reg:SI 289 [ _342 ])
(nil))))))
during RTL pass: reload
../../../libgfortran/generated/matmul_i4.c:3006:1: internal compiler error: in
lra_split_hard_reg_for, at lra-assigns.cc:1862
^ permalink raw reply [flat|nested] 6+ messages in thread* [Bug middle-end/113354] Regression/14: unable to find a register to spill on mips
2024-01-12 12:28 [Bug middle-end/113354] New: Regression/14: unable to find a register to spill on mips syq at gcc dot gnu.org
@ 2024-01-12 14:02 ` syq at gcc dot gnu.org
2024-01-12 18:34 ` vmakarov at gcc dot gnu.org
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: syq at gcc dot gnu.org @ 2024-01-12 14:02 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113354
--- Comment #1 from YunQiang Su <syq at gcc dot gnu.org> ---
In file included from
../../../../../libstdc++-v3/src/c++17/floating_from_chars.cc:86:
../../../../../libstdc++-v3/src/c++17/fast_float/fast_float.h: In function
‘std::from_chars_result {anonymous}::fast_float::from_chars_advanced(const c
har*, const char*, T&, parse_options) [with T = double]’:
../../../../../libstdc++-v3/src/c++17/fast_float/fast_float.h:3039:1: error:
unable to find a register to spill
3039 | }
| ^
../../../../../libstdc++-v3/src/c++17/fast_float/fast_float.h:3039:1: error:
this is the insn:
(insn 3578 7721 7722 263 (parallel [
(set (reg:SI 3353)
(plus:SI (mult:SI (reg:SI 3185 [orig:2219 _914+4 ] [2219])
(reg:SI 2175 [ _280+4 ]))
(reg:SI 3354)))
(clobber (reg:SI 3186 [3073]))
(clobber (reg:SI 3074))
])
"../../../../../libstdc++-v3/src/c++17/fast_float/fast_float.h":248:26 42
{*mul_acc_si}
(expr_list:REG_UNUSED (reg:SI 3074)
(expr_list:REG_UNUSED (reg:SI 3186 [3073])
(expr_list:REG_DEAD (reg:SI 3354)
(expr_list:REG_DEAD (reg:SI 3185 [orig:2219 _914+4 ] [2219])
(nil))))))
during RTL pass: reload
../../../../../libstdc++-v3/src/c++17/fast_float/fast_float.h:3039:1: internal
compiler error: in lra_split_hard_reg_for, at lra-assigns.cc:1862
0x7cf140 _fatal_insn(char const*, rtx_def const*, char const*, int, char
const*)
../../gcc/rtl-error.cc:108
0x10184c5
lra_split_hard_reg_for()
../../gcc/lra-assigns.cc:1862
0x1012405
lra(_IO_FILE*, int)
../../gcc/lra.cc:2518
0xfc76df do_reload
../../gcc/ira.cc:5973
0xfc76df execute
../../gcc/ira.cc:6161
^ permalink raw reply [flat|nested] 6+ messages in thread* [Bug middle-end/113354] Regression/14: unable to find a register to spill on mips
2024-01-12 12:28 [Bug middle-end/113354] New: Regression/14: unable to find a register to spill on mips syq at gcc dot gnu.org
2024-01-12 14:02 ` [Bug middle-end/113354] " syq at gcc dot gnu.org
@ 2024-01-12 18:34 ` vmakarov at gcc dot gnu.org
2024-01-13 0:46 ` [Bug middle-end/113354] [14 Regression] : " pinskia at gcc dot gnu.org
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: vmakarov at gcc dot gnu.org @ 2024-01-12 18:34 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113354
Vladimir Makarov <vmakarov at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |vmakarov at gcc dot gnu.org
--- Comment #2 from Vladimir Makarov <vmakarov at gcc dot gnu.org> ---
Thank you for reporting this. The issue is not in the patch itself. The patch
simply triggered a hidden bug.
The insn in the question looks like
1657: {r3001:SI=r291:SI*r294:SI+r3002:SI;clobber r2788:SI;clobber r2390:SI;}
On the 1st subpass we choose alternative with the following constraints
(0) l (1) d (2) d (3) l (4) X (5) X {*mul_acc_si}
On the second subpass we choose alternative
(0) l (1) d (2) d (3) l (4) X (5) X {*mul_acc_si}
p2788 happened to get MD0 and it prevents p3001 to get MD0 too. p2788 can be
in any location for this alternative but LRA assignment subpass does not take
this into account.
I'll try to fix this hidden bug on the beginning of the next week.
^ permalink raw reply [flat|nested] 6+ messages in thread* [Bug middle-end/113354] [14 Regression] : unable to find a register to spill on mips
2024-01-12 12:28 [Bug middle-end/113354] New: Regression/14: unable to find a register to spill on mips syq at gcc dot gnu.org
2024-01-12 14:02 ` [Bug middle-end/113354] " syq at gcc dot gnu.org
2024-01-12 18:34 ` vmakarov at gcc dot gnu.org
@ 2024-01-13 0:46 ` pinskia at gcc dot gnu.org
2024-01-15 15:26 ` cvs-commit at gcc dot gnu.org
2024-01-17 9:44 ` syq at gcc dot gnu.org
4 siblings, 0 replies; 6+ messages in thread
From: pinskia at gcc dot gnu.org @ 2024-01-13 0:46 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113354
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Last reconfirmed| |2024-01-13
Target Milestone|--- |14.0
CC| |pinskia at gcc dot gnu.org
Ever confirmed|0 |1
Summary|Regression/14: unable to |[14 Regression] : unable to
|find a register to spill on |find a register to spill on
|mips |mips
Status|UNCONFIRMED |NEW
Keywords| |ice-on-valid-code, ra
--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
.
^ permalink raw reply [flat|nested] 6+ messages in thread* [Bug middle-end/113354] [14 Regression] : unable to find a register to spill on mips
2024-01-12 12:28 [Bug middle-end/113354] New: Regression/14: unable to find a register to spill on mips syq at gcc dot gnu.org
` (2 preceding siblings ...)
2024-01-13 0:46 ` [Bug middle-end/113354] [14 Regression] : " pinskia at gcc dot gnu.org
@ 2024-01-15 15:26 ` cvs-commit at gcc dot gnu.org
2024-01-17 9:44 ` syq at gcc dot gnu.org
4 siblings, 0 replies; 6+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2024-01-15 15:26 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113354
--- Comment #4 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Vladimir Makarov <vmakarov@gcc.gnu.org>:
https://gcc.gnu.org/g:76bc70387d936e3c929368c265ce71e8b239e7b7
commit r14-7248-g76bc70387d936e3c929368c265ce71e8b239e7b7
Author: Vladimir N. Makarov <vmakarov@redhat.com>
Date: Mon Jan 15 10:19:39 2024 -0500
[PR113354][LRA]: Fixing LRA failure on building MIPS GCC
My recent patch for PR112918 triggered a hidden bug in LRA on MIPS. A
pseudo is matched to a register constraint and assigned to a hard
registers at the first constraint sub-pass but later it is matched to
X constraint. Keeping this pseudo in the register (MD0) prevents to
use the same register for another pseudo in the insn and this results
in LRA failure. The patch fixes this by spilling the pseudo at the
constraint subpass when the chosen alternative constraint not require
hard register anymore.
gcc/ChangeLog:
PR middle-end/113354
* lra-constraints.cc (curr_insn_transform): Spill pseudo only used
in the insn if the corresponding operand does not require hard
register anymore.
^ permalink raw reply [flat|nested] 6+ messages in thread* [Bug middle-end/113354] [14 Regression] : unable to find a register to spill on mips
2024-01-12 12:28 [Bug middle-end/113354] New: Regression/14: unable to find a register to spill on mips syq at gcc dot gnu.org
` (3 preceding siblings ...)
2024-01-15 15:26 ` cvs-commit at gcc dot gnu.org
@ 2024-01-17 9:44 ` syq at gcc dot gnu.org
4 siblings, 0 replies; 6+ messages in thread
From: syq at gcc dot gnu.org @ 2024-01-17 9:44 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113354
YunQiang Su <syq at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |RESOLVED
Resolution|--- |FIXED
--- Comment #5 from YunQiang Su <syq at gcc dot gnu.org> ---
Thanks. I can confirm that this issue has be fixed.
^ permalink raw reply [flat|nested] 6+ messages in thread
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2024-01-12 12:28 [Bug middle-end/113354] New: Regression/14: unable to find a register to spill on mips syq at gcc dot gnu.org
2024-01-12 14:02 ` [Bug middle-end/113354] " syq at gcc dot gnu.org
2024-01-12 18:34 ` vmakarov at gcc dot gnu.org
2024-01-13 0:46 ` [Bug middle-end/113354] [14 Regression] : " pinskia at gcc dot gnu.org
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