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* [Bug rtl-optimization/113362] New: RISCV64 divide and remainder with the same operands generates two divide operations
@ 2024-01-12 19:40 sh1.gccbug at tikouka dot nz
2024-01-12 20:03 ` [Bug target/113362] " pinskia at gcc dot gnu.org
2024-01-12 20:08 ` pinskia at gcc dot gnu.org
0 siblings, 2 replies; 3+ messages in thread
From: sh1.gccbug at tikouka dot nz @ 2024-01-12 19:40 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113362
Bug ID: 113362
Summary: RISCV64 divide and remainder with the same operands
generates two divide operations
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rtl-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: sh1.gccbug at tikouka dot nz
Target Milestone: ---
Input:
void fn(uint64_t out[2], uint64_t x, uint64_t y) {
out[0] = x / y;
out[1] = x % y;
}
Output:
fn(unsigned long*, unsigned long, unsigned long):
divu a5,a1,a2
remu a1,a1,a2
sd a5,0(a0)
sd a1,8(a0)
ret
https://godbolt.org/z/15Tn9PqGe
The `remu` operation may be better off replaced with a multiply and subtract
like how LLVM does it. Otherwise it may result in a redundant, slow division
operation.
^ permalink raw reply [flat|nested] 3+ messages in thread* [Bug target/113362] RISCV64 divide and remainder with the same operands generates two divide operations 2024-01-12 19:40 [Bug rtl-optimization/113362] New: RISCV64 divide and remainder with the same operands generates two divide operations sh1.gccbug at tikouka dot nz @ 2024-01-12 20:03 ` pinskia at gcc dot gnu.org 2024-01-12 20:08 ` pinskia at gcc dot gnu.org 1 sibling, 0 replies; 3+ messages in thread From: pinskia at gcc dot gnu.org @ 2024-01-12 20:03 UTC (permalink / raw) To: gcc-bugs https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113362 Andrew Pinski <pinskia at gcc dot gnu.org> changed: What |Removed |Added ---------------------------------------------------------------------------- Severity|normal |enhancement --- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> --- I thought I saw this before. This is 100% a target specific issue and might even be a cost model issue. ^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug target/113362] RISCV64 divide and remainder with the same operands generates two divide operations 2024-01-12 19:40 [Bug rtl-optimization/113362] New: RISCV64 divide and remainder with the same operands generates two divide operations sh1.gccbug at tikouka dot nz 2024-01-12 20:03 ` [Bug target/113362] " pinskia at gcc dot gnu.org @ 2024-01-12 20:08 ` pinskia at gcc dot gnu.org 1 sibling, 0 replies; 3+ messages in thread From: pinskia at gcc dot gnu.org @ 2024-01-12 20:08 UTC (permalink / raw) To: gcc-bugs https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113362 Andrew Pinski <pinskia at gcc dot gnu.org> changed: What |Removed |Added ---------------------------------------------------------------------------- Status|UNCONFIRMED |NEW Ever confirmed|0 |1 Last reconfirmed| |2024-01-12 --- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> --- The way divu/remu should be modeled as one instruction (using also the divmod/udivmod optab to expand them) and then split into either divu or remu or divu/mul/sub in split1 depending on the REG_UNUSED notes. ^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2024-01-12 20:08 UTC | newest] Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2024-01-12 19:40 [Bug rtl-optimization/113362] New: RISCV64 divide and remainder with the same operands generates two divide operations sh1.gccbug at tikouka dot nz 2024-01-12 20:03 ` [Bug target/113362] " pinskia at gcc dot gnu.org 2024-01-12 20:08 ` pinskia at gcc dot gnu.org
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