[Bug c/113608] New: RISC-V: Vector spills after enabling vector abi

[Bug c/113608] New: RISC-V: Vector spills after enabling vector abi

[juzhe.zhong at rivai dot ai]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113608

            Bug ID: 113608
           Summary: RISC-V: Vector spills after enabling vector abi
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
          Assignee: unassigned at gcc dot gnu.org
          Reporter: juzhe.zhong at rivai dot ai
  Target Milestone: ---

https://godbolt.org/z/srdd4qhdc

#include "riscv_vector.h"

vint32m8_t
foo (int32_t *__restrict a, int32_t *__restrict b, int32_t *__restrict c,
     int32_t *__restrict a2, int32_t *__restrict b2, int32_t *__restrict c2,
     int32_t *__restrict a3, int32_t *__restrict b3, int32_t *__restrict c3,
     int32_t *__restrict a4, int32_t *__restrict b4, int32_t *__restrict c4,
     int32_t *__restrict a5, int32_t *__restrict b5, int32_t *__restrict c5,
     int32_t *__restrict d, int32_t *__restrict d2, int32_t *__restrict d3,
     int32_t *__restrict d4, int32_t *__restrict d5, int n, vint32m8_t vector)
{
  for (int i = 0; i < n; i++)
    {
      a[i] = b[i] + c[i];
      b5[i] = b[i] + c[i];
      a2[i] = b2[i] + c2[i];
      a3[i] = b3[i] + c3[i];
      a4[i] = b4[i] + c4[i];
      a5[i] = a[i] + a4[i];
      d2[i] = a2[i] + c2[i];
      d3[i] = a3[i] + c3[i];
      d4[i] = a4[i] + c4[i];
      d5[i] = a[i] + a4[i];
      a[i] = a5[i] + b5[i] + a[i];

      c2[i] = a[i] + c[i];
      c3[i] = b5[i] * a5[i];
      c4[i] = a2[i] * a3[i];
      c5[i] = b5[i] * a2[i];
      c[i] = a[i] + c3[i];
      c2[i] = a[i] + c4[i];
      a5[i] = a[i] + a4[i];
      a[i] = a[i] + b5[i]
             + a[i] * a2[i] * a3[i] * a4[i] * a5[i] * c[i] * c2[i] * c3[i]
                 * c4[i] * c5[i] * d[i] * d2[i] * d3[i] * d4[i] * d5[i];
    }
    return vector;
}

This case will have vector spills after enabling default vector ABI.

[Bug target/113608] RISC-V: Vector spills after enabling vector abi

[lehua.ding at rivai dot ai]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113608

--- Comment #1 from Lehua Ding <lehua.ding at rivai dot ai> ---
(In reply to JuzheZhong from comment #0)
> https://godbolt.org/z/srdd4qhdc
> 
> #include "riscv_vector.h"
> 
> vint32m8_t
> foo (int32_t *__restrict a, int32_t *__restrict b, int32_t *__restrict c,
>      int32_t *__restrict a2, int32_t *__restrict b2, int32_t *__restrict c2,
>      int32_t *__restrict a3, int32_t *__restrict b3, int32_t *__restrict c3,
>      int32_t *__restrict a4, int32_t *__restrict b4, int32_t *__restrict c4,
>      int32_t *__restrict a5, int32_t *__restrict b5, int32_t *__restrict c5,
>      int32_t *__restrict d, int32_t *__restrict d2, int32_t *__restrict d3,
>      int32_t *__restrict d4, int32_t *__restrict d5, int n, vint32m8_t
> vector)
> {
>   for (int i = 0; i < n; i++)
>     {
>       a[i] = b[i] + c[i];
>       b5[i] = b[i] + c[i];
>       a2[i] = b2[i] + c2[i];
>       a3[i] = b3[i] + c3[i];
>       a4[i] = b4[i] + c4[i];
>       a5[i] = a[i] + a4[i];
>       d2[i] = a2[i] + c2[i];
>       d3[i] = a3[i] + c3[i];
>       d4[i] = a4[i] + c4[i];
>       d5[i] = a[i] + a4[i];
>       a[i] = a5[i] + b5[i] + a[i];
> 
>       c2[i] = a[i] + c[i];
>       c3[i] = b5[i] * a5[i];
>       c4[i] = a2[i] * a3[i];
>       c5[i] = b5[i] * a2[i];
>       c[i] = a[i] + c3[i];
>       c2[i] = a[i] + c4[i];
>       a5[i] = a[i] + a4[i];
>       a[i] = a[i] + b5[i]
> 	     + a[i] * a2[i] * a3[i] * a4[i] * a5[i] * c[i] * c2[i] * c3[i]
> 		 * c4[i] * c5[i] * d[i] * d2[i] * d3[i] * d4[i] * d5[i];
>     }
>     return vector;
> }
> 
> This case will have vector spills after enabling default vector ABI.

These vector save and restore (spills) are reasonable since the function use
v1-v5 registers which are callee-saved registers. Before enable
riscv-vector-abi, all vector registers are caller-saved registers. So there are
fewer vector registers that do not require save-restore we can use after enable
vector ABI.

But the vector move insn of argument is no need, I think this is a IRA problem
need to debug. Here is a simple case repreduce:
https://godbolt.org/z/e76Ynzcx6

[Bug target/113608] RISC-V: Vector spills after enabling vector abi

[juzhe.zhong at rivai dot ai]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113608

--- Comment #2 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
vuint16m2_t vadd(vuint16m2_t a, vuint8m1_t b) {
    int vl = __riscv_vsetvlmax_e8m1();
    vuint16m2_t c = __riscv_vzext_vf2_u16m2(b, vl);
    return __riscv_vadd_vv_u16m2(a, c, vl);
}