[Bug target/113766] New: ICE: in generate_insn, at config/riscv/riscv-vector-builtins.cc:4186 with (invalid?) __riscv_vfredosum_tu()

[Bug target/113766] New: ICE: in generate_insn, at config/riscv/riscv-vector-builtins.cc:4186 with (invalid?) __riscv_vfredosum_tu()

[zsojka at seznam dot cz]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113766

            Bug ID: 113766
           Summary: ICE: in generate_insn, at
                    config/riscv/riscv-vector-builtins.cc:4186 with
                    (invalid?) __riscv_vfredosum_tu()
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: zsojka at seznam dot cz
  Target Milestone: ---
              Host: x86_64-pc-linux-gnu
            Target: riscv64-unknown-linux-gnu

Created attachment 57323
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=57323&action=edit
reduced testcase

Compiler output:
$ riscv64-unknown-linux-gnu-gcc -march=rv64gv testcase.c 
during RTL pass: expand
testcase.c: In function 'foo':
testcase.c:6:3: internal compiler error: in generate_insn, at
config/riscv/riscv-vector-builtins.cc:4186
    6 |   __riscv_vfredosum_tu();
      |   ^~~~~~~~~~~~~~~~~~~~~~
0xb9bd49 riscv_vector::function_expander::generate_insn(insn_code)
        /repo/gcc-trunk/gcc/config/riscv/riscv-vector-builtins.cc:4186
0xb9bd49 riscv_vector::function_expander::generate_insn(insn_code)
        /repo/gcc-trunk/gcc/config/riscv/riscv-vector-builtins.cc:4184
0x1bcd50d riscv_vector::function_expander::expand()
        /repo/gcc-trunk/gcc/config/riscv/riscv-vector-builtins.h:582
0x1bcd50d riscv_vector::expand_builtin(unsigned int, tree_node*, rtx_def*)
        /repo/gcc-trunk/gcc/config/riscv/riscv-vector-builtins.cc:4589
0x12ca5e3 expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**, bool)
        /repo/gcc-trunk/gcc/expr.cc:12350
0x1187df8 expand_expr(tree_node*, rtx_def*, machine_mode, expand_modifier)
        /repo/gcc-trunk/gcc/expr.h:316
0x1187df8 expand_call_stmt
        /repo/gcc-trunk/gcc/cfgexpand.cc:2864
0x1187df8 expand_gimple_stmt_1
        /repo/gcc-trunk/gcc/cfgexpand.cc:3926
0x1187df8 expand_gimple_stmt
        /repo/gcc-trunk/gcc/cfgexpand.cc:4071
0x118e45e expand_gimple_basic_block
        /repo/gcc-trunk/gcc/cfgexpand.cc:6127
0x1190067 execute
        /repo/gcc-trunk/gcc/cfgexpand.cc:6866
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.


$ riscv64-unknown-linux-gnu-gcc -v
Using built-in specs.
COLLECT_GCC=/repo/gcc-trunk/binary-latest-riscv64/bin/riscv64-unknown-linux-gnu-gcc
COLLECT_LTO_WRAPPER=/repo/gcc-trunk/binary-trunk-r14-8795-20240204180638-g91e09b3a7e9-checking-yes-rtl-df-extra-riscv64/bin/../libexec/gcc/riscv64-unknown-linux-gnu/14.0.1/lto-wrapper
Target: riscv64-unknown-linux-gnu
Configured with: /repo/gcc-trunk//configure --enable-languages=c,c++
--enable-valgrind-annotations --disable-nls --enable-checking=yes,rtl,df,extra
--with-cloog --with-ppl --with-isl --with-isa-spec=2.2
--with-sysroot=/usr/riscv64-unknown-linux-gnu --build=x86_64-pc-linux-gnu
--host=x86_64-pc-linux-gnu --target=riscv64-unknown-linux-gnu
--with-ld=/usr/bin/riscv64-unknown-linux-gnu-ld
--with-as=/usr/bin/riscv64-unknown-linux-gnu-as --disable-multilib
--disable-libstdcxx-pch
--prefix=/repo/gcc-trunk//binary-trunk-r14-8795-20240204180638-g91e09b3a7e9-checking-yes-rtl-df-extra-riscv64
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 14.0.1 20240205 (experimental) (GCC)

[Bug target/113766] ICE: in generate_insn, at config/riscv/riscv-vector-builtins.cc:4186 with (invalid?) __riscv_vfredosum_tu()

[pan2.li at intel dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113766

--- Comment #1 from Li Pan <pan2.li at intel dot com> ---
Thanks, I will take care of it.

[Bug target/113766] ICE: in generate_insn, at config/riscv/riscv-vector-builtins.cc:4186 with (invalid?) __riscv_vfredosum_tu()

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113766

--- Comment #2 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <panli@gcc.gnu.org>:

https://gcc.gnu.org/g:db5c3f6d952bc3950d23c0a6be4e8ec9147ef752

commit r14-8834-gdb5c3f6d952bc3950d23c0a6be4e8ec9147ef752
Author: Pan Li <pan2.li@intel.com>
Date:   Tue Feb 6 15:35:02 2024 +0800

    RISC-V: Bugfix for RVV overloaded intrinisc ICE when empty args

    There is one corn case when similar as below example:

    void test (void)
    {
      __riscv_vfredosum_tu ();
    }

    It will meet ICE because of the implement details of overloaded function
    in gcc.  According to the rvv intrinisc doc, we have no such overloaded
    function with empty args.  Unfortunately, we register the empty args
    function as overloaded for avoiding conflict.  Thus, there will be actual
    one register function after return NULL_TREE back to the middle-end,
    and finally result in ICE when expanding.  For example:

    1. First we registered void __riscv_vfredmax () as the overloaded function.
    2. Then resolve_overloaded_builtin (this func) return NULL_TREE.
    3. The functions register in step 1 bypass the args check as empty args.
    4. Finally, fall into expand_builtin with empty args and meet ICE.

    Here we report error when overloaded function with empty args.  For
example:

    test.c: In function 'foo':
    test.c:8:3: error: no matching function call to '__riscv_vfredosum_tu' with
empty args
        8 |   __riscv_vfredosum_tu();
          |   ^~~~~~~~~~~~~~~~~~~~

    Below test are passed for this patch.

    * The riscv regression tests.

            PR target/113766

    gcc/ChangeLog:

            * config/riscv/riscv-protos.h (resolve_overloaded_builtin): Adjust
            the signature of func.
            * config/riscv/riscv-c.cc (riscv_resolve_overloaded_builtin):
Ditto.
            * config/riscv/riscv-vector-builtins.cc
(resolve_overloaded_builtin): Make
            overloaded func with empty args error.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/base/pr113766-1.c: New test.
            * gcc.target/riscv/rvv/base/pr113766-2.c: New test.

    Signed-off-by: Pan Li <pan2.li@intel.com>

[Bug target/113766] ICE: in generate_insn, at config/riscv/riscv-vector-builtins.cc:4186 with (invalid?) __riscv_vfredosum_tu()

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113766

--- Comment #3 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <panli@gcc.gnu.org>:

https://gcc.gnu.org/g:9ec08782b45869b33fec2a8772c25118221208e3

commit r14-8875-g9ec08782b45869b33fec2a8772c25118221208e3
Author: Pan Li <pan2.li@intel.com>
Date:   Wed Feb 7 16:34:46 2024 +0800

    RISC-V: Bugfix for RVV overloaded intrinsic ICE in function checker

    There is another corn case when similar as below example:

    void test (void)
    {
      __riscv_vaadd ();
    }

    We report error when overloaded function with empty args.  For example:

    test.c: In function 'foo':
    test.c:8:3: error: no matching function call to '__riscv_vaadd' with empty
args
        8 |   __riscv_vaadd ();
          |   ^~~~~~~~~~~~~~~~~~~~

    Unfortunately, it will meet another ICE similar to below after above
    message.  The underlying build function checker will have zero args
    and break some assumption of the function checker.  For example, the
    count of args is not less than 2.

    ice.c: In function âfooâ:
    ice.c:8:3: internal compiler error: in require_immediate, at
    config/riscv/riscv-vector-builtins.cc:4252
        8 |   __riscv_vaadd ();
          |   ^~~~~~~~~~~~~
    0x20b36ac riscv_vector::function_checker::require_immediate(unsigned
    int, long, long) const
           
.../__RISC-V_BUILD__/../gcc/config/riscv/riscv-vector-builtins.cc:4252
    0x20b890c riscv_vector::alu_def::check(riscv_vector::function_checker&)
const
           
.../__RISC-V_BUILD__/../gcc/config/riscv/riscv-vector-builtins-shapes.cc:387
    0x20b38d7 riscv_vector::function_checker::check()
           
.../__RISC-V_BUILD__/../gcc/config/riscv/riscv-vector-builtins.cc:4315
    0x20b4876 riscv_vector::check_builtin_call(unsigned int, vec<unsigned int,
va_heap, vl_ptr>,
           
.../__RISC-V_BUILD__/../gcc/config/riscv/riscv-vector-builtins.cc:4605
    0x2069393 riscv_check_builtin_call
            .../__RISC-V_BUILD__/../gcc/config/riscv/riscv-c.cc:227

    Below test are passed for this patch.

    * The riscv regression tests.

            PR target/113766

    gcc/ChangeLog:

            * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def):
Make
            sure the c.arg_num is >= 2 before checking.
            (struct build_frm_base): Ditto.
            (struct narrow_alu_def): Ditto.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/base/pr113766-1.c: Add new cases.

    Signed-off-by: Pan Li <pan2.li@intel.com>