[Bug target/113869] New: V4HF->V4SF pattern seems to be missing

[Bug target/113869] New: V4HF->V4SF pattern seems to be missing

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113869

            Bug ID: 113869
           Summary: V4HF->V4SF pattern seems to be missing
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Keywords: missed-optimization
          Severity: enhancement
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: pinskia at gcc dot gnu.org
  Target Milestone: ---
            Target: aarch64

Take:
```
void f( _Float16 * __restrict  a, float * __restrict b)
{

 b[0] = a[0];
 b[1] = a[1];
 b[2] = a[2];
 b[3] = a[3];
 b+=4;a+=4;
#if 0
 b[0] = a[0];
 b[1] = a[1];
 b[2] = a[2];
 b[3] = a[3];
#endif
}
```

The pattern that converts V4HF to V4SF seems be to missing and we don't SLP the
above. We able to handle V8HF to V8SF which does:
```
        fcvtl   v30.4s, v31.4h
        fcvtl2  v31.4s, v31.8h
```

But the first fcvtl is exactly what we want for V4HF->V4SF.

[Bug target/113869] V4HF->V4SF pattern seems to be missing

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113869

--- Comment #1 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pengxuan Zheng <pzheng@gcc.gnu.org>:

https://gcc.gnu.org/g:230d62a2cdd16c1ec8fe87998ec01081503f010d

commit r15-1079-g230d62a2cdd16c1ec8fe87998ec01081503f010d
Author: Pengxuan Zheng <quic_pzheng@quicinc.com>
Date:   Thu May 30 17:53:23 2024 -0700

    aarch64: Add vector floating point extend pattern [PR113880, PR113869]

    This patch adds vector floating point extend pattern for V2SF->V2DF and
    V4HF->V4SF conversions by renaming the existing
aarch64_float_extend_lo_<Vwide>
    pattern to the standard optab one, i.e., extend<mode><Vwide>2. This allows
the
    vectorizer to vectorize certain floating point widening operations for the
    aarch64 target.

            PR target/113880
            PR target/113869

    gcc/ChangeLog:

            * config/aarch64/aarch64-builtins.cc (VAR1): Remap float_extend_lo_
            builtin codes to standard optab ones.
            * config/aarch64/aarch64-simd.md (aarch64_float_extend_lo_<Vwide>):
Rename
            to...
            (extend<mode><Vwide>2): ... This.

    gcc/testsuite/ChangeLog:

            * gcc.target/aarch64/extend-vec.c: New test.

    Signed-off-by: Pengxuan Zheng <quic_pzheng@quicinc.com>

[Bug target/113869] V4HF->V4SF pattern seems to be missing

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113869

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|UNCONFIRMED                 |RESOLVED
   Target Milestone|---                         |15.0

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Fixed. Note V4SF->V4HF was added with
r15-1182-ge7cd8ea1fa3e48404954bb7c06e9bcd603f132dd.

https://gcc.gnu.org/pipermail/gcc-cvs/2024-June/404047.html