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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/114310] [11/12/13/14 Regression] [aarch64] __sync_val_compare_and_swap fails on __int128_t with newval = 0
Date: Tue, 12 Mar 2024 00:25:44 +0000 [thread overview]
Message-ID: <bug-114310-4-ZI3GoEneTp@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-114310-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114310
--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Jeffrey A. Law from comment #2)
> !?! That doesn't make any sense to me Andrew. This is a failure to match
> the insn, not a constraint error. And given the existence of a zero
> register, isn't zero valid anywhere a general purpose register is valid?
Then the issue is with the other side of UNSPECV_ATOMIC_CMPSW for the isns part
rather than the expand part. I had only quickly looked the MD file and what
was done to fix the other bug.
next prev parent reply other threads:[~2024-03-12 0:25 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-11 17:48 [Bug c/114310] New: " p.nguyen at yahooinc dot com
2024-03-11 18:01 ` [Bug target/114310] [11/12/13/14 Regression] " pinskia at gcc dot gnu.org
2024-03-12 0:13 ` law at gcc dot gnu.org
2024-03-12 0:25 ` pinskia at gcc dot gnu.org [this message]
2024-03-12 12:03 ` rguenth at gcc dot gnu.org
2024-03-13 18:13 ` jakub at gcc dot gnu.org
2024-03-14 13:10 ` cvs-commit at gcc dot gnu.org
2024-03-14 15:34 ` [Bug target/114310] [11/12/13 " jakub at gcc dot gnu.org
2024-03-15 23:29 ` cvs-commit at gcc dot gnu.org
2024-03-18 14:41 ` [Bug target/114310] [11/12 " jakub at gcc dot gnu.org
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