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From: "dizhao at os dot amperecomputing.com" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/114513] New: [aarch64] floating-point registers are used when GPRs are preferred Date: Thu, 28 Mar 2024 09:10:40 +0000 [thread overview] Message-ID: <bug-114513-4@http.gcc.gnu.org/bugzilla/> (raw) https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114513 Bug ID: 114513 Summary: [aarch64] floating-point registers are used when GPRs are preferred Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: dizhao at os dot amperecomputing.com Target Milestone: --- For the case below: typedef unsigned long int uint64_t; extern uint64_t rand_long (); double phi () { double phi; register uint64_t a, b; const uint64_t mask = 1ULL << 63; int i; /* Pick any two starting points */ a = rand_long (); b = rand_long (); /* Iterate until we approach overflow */ for (i = 0; (i < 64) && !((a | b) & mask); i++) { register uint64_t c = a + b; a = b; b = c; } phi = (double) b / (double) a; return phi; } On aarch64, GCC used floating-point registers for the loop: subs w1, w1, #0x1 fmov d15, d31 fmov d31, x2 b.eq 48 <phi+0x48> // b.none However, keeping "a" and "b" in GENERAL_REGS is much faster, like: mov x19, x0 mov x0, x3 subs w2, w2, #0x1 b.eq 48 The option I used is -Ofast/-O3, with -mtune=generic/neoverse-n1/neoverse-n2/ampere1 .
next reply other threads:[~2024-03-28 9:10 UTC|newest] Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-03-28 9:10 dizhao at os dot amperecomputing.com [this message] 2024-03-28 9:17 ` [Bug rtl-optimization/114513] " dizhao at os dot amperecomputing.com 2024-03-28 21:55 ` [Bug target/114513] [11/12/13/14 Regression] " pinskia at gcc dot gnu.org 2024-03-28 22:01 ` pinskia at gcc dot gnu.org 2024-03-29 23:47 ` law at gcc dot gnu.org 2024-04-18 10:51 ` tnfchris at gcc dot gnu.org
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