[Bug c++/115018] New: Incorrect data read/written at -O3 on Arm with 256-bit SVE SIMD width specified

[Bug c++/115018] New: Incorrect data read/written at -O3 on Arm with 256-bit SVE SIMD width specified

[erik at kth dot se]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115018

            Bug ID: 115018
           Summary: Incorrect data read/written at -O3 on Arm with 256-bit
                    SVE SIMD width specified
           Product: gcc
           Version: 13.2.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c++
          Assignee: unassigned at gcc dot gnu.org
          Reporter: erik at kth dot se
  Target Milestone: ---

Created attachment 58154
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=58154&action=edit
Source code to reproduce the bug (only includes 3x std headers)

Hi GCC,

When testing Gromacs on Amazon's Graviton3 Arm nodes with SVE support using
Ubuntu 24.04 with gcc-13.2.0, I have been tracking down a strange failed unit
test that occurs in non-SVE code, but only when I manually specify 256-bit SVE
length (instead of auto).

This code had a ton of dependencies on Google test and other files, but I think
I have been able to isolated it to a small file that only includes vector and
array - see attachment.

The code in question creates a std::vector with 10 elements, where each element
is a std::array with 3 floats. Initially they are all set to zero, and then I
add (0,10,0) to all elements.

With this combination of high optimization and 256-bit SVE, only some of the
elements will be updated, while the other ones are still (0,0,0):


g++ -O3 -march=armv8.2-a+sve -msve-vector-bits=256 bug.cpp -Wall -Wextra
-fno-strict-aliasing -fwrapv -fno-aggressive-loop-optimizations

If I remove either then -O3, or -msve-vector-bits=256, the results are fine.

The bug also disappears if I don't have this slightly-complex multi-level
inheritance, or if I use plain C arrays instead of std containers, or remove
any of the other seemingly stupid constructs in the attached example - but at
least I saved you from having to debug all of Google test :-)

[Bug target/115018] Incorrect data read/written at -O3 on aarch64 with 256-bit SVE SIMD width specified

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115018

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
First I can't reproduce it with the official releases GCC 13.2.0.

Second with the trunk, I am not sure if this is a bug or not.

With the trunk with `-O3 -Wall -Wextra -fno-strict-aliasing -fwrapv
-fno-aggressive-loop-optimizations -march=armv8.2-a+sve -msve-vector-bits=256 `
Running under qemu like this:

[apinski@xeond2 upstream-cross-aarch64]$ ./install-qemu/bin/qemu-aarch64 -cpu
max,sve128=on,sve256=on a.out
x[ 0]: 0 0 0
x[ 1]: 0 0 0
x[ 2]: 0 0 0
x[ 3]: 0 0 0
x[ 4]: 0 0 0
x[ 5]: 0 0 0
x[ 6]: 0 0 0
x[ 7]: 0 0 0
x[ 8]: 0 0 0
x[ 9]: 0 0 0
x[ 0]: 0 10 0
x[ 1]: 0 10 0
x[ 2]: 0 10 0
x[ 3]: 0 10 0
x[ 4]: 0 10 0
x[ 5]: 0 10 0
x[ 6]: 0 10 0
x[ 7]: 0 10 0
x[ 8]: 0 10 0
x[ 9]: 0 10 0


Works.
But if I enable SVE512, it fails like you are describing:
[apinski@xeond2 upstream-cross-aarch64]$ ./install-qemu/bin/qemu-aarch64 -cpu
max,sve128=on,sve256=on,sve512=on a.out
x[ 0]: 0 0 0
x[ 1]: 0 0 0
x[ 2]: 0 0 0
x[ 3]: 0 0 0
x[ 4]: 0 0 0
x[ 5]: 0 0 0
x[ 6]: 0 0 0
x[ 7]: 0 0 0
x[ 8]: 0 0 0
x[ 9]: 0 0 0
x[ 0]: 0 10 0
x[ 1]: 0 10 0
x[ 2]: 0 10 0
x[ 3]: 0 0 0
x[ 4]: 0 0 0
x[ 5]: 0 10 0
x[ 6]: 0 10 0
x[ 7]: 0 10 0
x[ 8]: 0 0 0
x[ 9]: 0 0 0

[Bug target/115018] Incorrect data read/written at -O3 on aarch64 with 256-bit SVE SIMD width specified

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115018

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2024-05-09
     Ever confirmed|0                           |1
             Status|UNCONFIRMED                 |WAITING

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
https://community.arm.com/support-forums/f/high-performance-computing-forum/54025/size-of-vectors-in-sve2