[Bug target/45335] Use ldrd to load two consecutive words

[Bug target/45335] Use ldrd to load two consecutive words

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=45335

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to work|                            |14.0, 7.3.0
             Status|NEW                         |RESOLVED
         Resolution|---                         |FIXED
      Known to fail|                            |4.6.4, 5.4.0
   Target Milestone|---                         |7.0

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
6.3.0 produced:

        sub     r1, r4, #16
        ldr     r4, [r4, #-4]
        ldr     r0, .L3+4
        ldm     r1, {r1, r2, r3}

5.4.0 produced:

        sub     r1, r4, #16
        ldr     r4, [r4, #-4]
        ldr     r0, .L3+4
        ldmia   r1, {r1, r2, r3}

7.40 produced:

        ldrd    r2, r3, [r4, #-12]
        ldr     r1, [r4, #-16]
        ldrd    r4, r5, [r4, #-4]
        ldr     r0, .L4+4
        strd    r4, r5, [sp]

Which was changed by r7-4653-g2fe3721128b991 or r7-991-g37923729c5ab01 .

The ldrd support was added originally with r0-122648-g4542a38a21fea5 (for GCC
4.9.0).

So closing as fixed.

[Bug target/45335] Use ldrd to load two consecutive words

[ramana at gcc dot gnu dot org]

-- 

ramana at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
     Ever Confirmed|0                           |1
           Keywords|                            |missed-optimization
   Last reconfirmed|0000-00-00 00:00:00         |2010-08-23 08:23:52
               date|                            |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45335

[Bug target/45335] Use ldrd to load two consecutive words

[carrot at google dot com]

------- Comment #1 from carrot at google dot com  2010-08-20 03:13 -------
By simply define the following pattern

(define_insn "*thumb2_ldrd"
  [(parallel [(set (match_operand:SI 0 "s_register_operand" "")
                   (mem:SI (match_operand:SI 2 "" "")))
              (set (match_operand:SI 1 "s_register_operand" "")
                   (mem:SI (match_operand:SI 3 "" "")))])]
  "TARGET_THUMB2 && thumb2_ldrd_addr (operands[2], operands[3])"
  "*
  {
    rtx ldrd_addr = thumb2_ldrd_addr (operands[2], operands[3]);
    operands[4] = gen_rtx_MEM (SImode, ldrd_addr);
    if (ldrd_addr == operands[3])
      return \"ldrd\\t%1, %0, %4\";
    else
      return \"ldrd\\t%0, %1, %4\";
  }"
)

The combine pass can't handle it. The instructions handled by combine should
have some def-use relation. There is no such relation in this case. So another
peephole2 rule is needed to catch the opportunity.

Even though there are chances missed. After register renumbering and
instruction scheduling, more chances are revealed. Change the option -O2 to -Os
can show such an example. So a peephole rule is needed to deal with this case.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45335