[Bug target/64691] New: Suboptimal register allocation for bytes comparison on i386

[Bug target/64691] New: Suboptimal register allocation for bytes comparison on i386

[enkovich.gnu at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64691

            Bug ID: 64691
           Summary: Suboptimal register allocation for bytes comparison on
                    i386
           Product: gcc
           Version: 5.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: enkovich.gnu at gmail dot com

This problem was actually found in 256.bzip2 benchmark codes compiled by GCC
5.0 on -O2.  There is a small loop with bytes comparison which appeared to be
ineffective because compared values were not allocated on registers allowing
byte access.  That caused additional copies and as a result significant loop
slow down.

Situation may be simulated on a small test if we restrict registers usage.

>cat test.c
void test (unsigned char *p, unsigned char val)
{
  unsigned char tmp1, tmp2;
  int i;

  i = 0;
  tmp1 = p[0];
  while (val != tmp1)
    {
      i++;
      tmp2 = tmp1;
      tmp1  = p[i];
      p[i] = tmp2;
    }
  p[0]= tmp1;
}
>gcc -O2 -m32 -ffixed-ebx test.c -S

Here is a loop:

.L3:
        movzbl  (%eax), %ebp
        movl    %esi, %ecx
        movb    %dl, (%eax)
        addl    $1, %eax
        movl    %ebp, %edx
        cmpb    %dl, %cl
        jne     .L3

We have an extra register copy esi->ecx to perform comparison.

Suppose the easiest way to get better register allocation here would be to
transform QI comparison into SI one to relax register constraints.

[Bug target/64691] Suboptimal register allocation for bytes comparison on i386

[ysrumyan at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64691

Yuri Rumyantsev <ysrumyan at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |ysrumyan at gmail dot com

--- Comment #1 from Yuri Rumyantsev <ysrumyan at gmail dot com> ---
I found another register allocation deficiency which can be exhibited at the
attached test-case extracted from important benchmark. If we look at inner loop
    for(i = 0; i < size; i++) {
        byte xr, xg, xb, t1;
        sbyte t2, t3;
        x1 = read[0];
        x2 = read[1];
        x3 = read[2];
        t1 = (byte) (((C1 * x1) + (C2 * x2) + (C3 * x3) +
                (1 << (SCALE - 1))) >> SCALE);
        t2 = (sbyte) (((C4 * x1) + (C5 * x2) + (C6 * x3) +
                (1 << (SCALE - 1))) >> SCALE);
        t3 = (sbyte) (((C7 * x1) + (C8 * x2) + (C9 * x3) +
                (1 << (SCALE - 1))) >> SCALE);
        write[0] = t1;
        write[1] = (byte) t2;
        write[2] = (byte) t3;
        read += 3;
        write += 3;
    }
we can see that 7 registers is enough to keep all variable (except for upper
loop bound): 3 registers for x1,x2,x3, 2 registers for read and write pointers
and 2 registers for computation one for t1,t2,t3  computations and one scratch
register for multiplications (but since consumers of t1,t2,t3 is byte store
this register must belong also to Q_REQS subset, i.e. AREG,BREG,CREG or DREG).
But LRA does not perform such allocation and this leads to redundant
spill/fills and results in performance degradation. Assembly file produced 6.0
compiler with "-O2 -m32 -march=slm" options is attached too.

[Bug target/64691] Suboptimal register allocation for bytes comparison on i386

[ysrumyan at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64691

--- Comment #2 from Yuri Rumyantsev <ysrumyan at gmail dot com> ---
Created attachment 35526
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=35526&action=edit
tset-case to reproduce and assembly file.

[Bug target/64691] Suboptimal register allocation for bytes comparison on i386

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64691

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2021-12-25
           Severity|normal                      |enhancement
             Status|UNCONFIRMED                 |NEW

--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Confirmed:
.L3:
        movl    %edx, %ecx
        movzbl  (%eax), %edx
        addl    $1, %eax
        movb    %cl, -1(%eax)
        movl    %esi, %ecx
        cmpb    %dl, %cl
        jne     .L3