[Bug target/65139] New: Improve register allocation for aarch64_*_sisd_or_int<mode>3 patterns

[Bug target/65139] New: Improve register allocation for aarch64_*_sisd_or_int<mode>3 patterns

[mkuvyrkov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65139

            Bug ID: 65139
           Summary: Improve register allocation for
                    aarch64_*_sisd_or_int<mode>3 patterns
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: enhancement
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: mkuvyrkov at gcc dot gnu.org

Following discussion in http://thread.gmane.org/gmane.comp.gcc.patches/336162 ,
review usage of early clobber in aarch64_lshr_sisd_or_int_≤mode>3,
aarch64_ashr_sisd_or_int_≤mode>3, and, maybe, other patterns.  Convert them to
use (match_scratch) and compare quality of generated code between the two
approaches.

In theory, (match_scratch) should give more freedom to RA, but this requires
double-checking.
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From: "ktkachov at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/65139] Improve register allocation for aarch64_*_sisd_or_int<mode>3 patterns
Date: Fri, 20 Feb 2015 14:20:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?ide139

ktkachov at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2015-02-20
                 CC|                            |ktkachov at gcc dot gnu.org
   Target Milestone|---                         |6.0
     Ever confirmed|0                           |1

--- Comment #1 from ktkachov at gcc dot gnu.org ---
Thanks for opening this, I was about to open this myself.
I guess this should be done for GCC 6

[Bug target/65139] Improve register allocation for aarch64_*_sisd_or_int<mode>3 patterns

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65139

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |ASSIGNED

[Bug target/65139] Improve register allocation for aarch64_*_sisd_or_int<mode>3 patterns

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65139

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |6.0
             Status|ASSIGNED                    |RESOLVED
         Resolution|---                         |FIXED

--- Comment #6 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Fixed in GCC 6:
r6-2459-gad7b853a10903e