[Bug rtl-optimization/66556] New: Wrong code-generation for armv7-a big-endian at -Os

[Bug rtl-optimization/66556] New: Wrong code-generation for armv7-a big-endian at -Os

[renlin at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66556

            Bug ID: 66556
           Summary: Wrong code-generation for armv7-a big-endian at -Os
           Product: gcc
           Version: 5.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: renlin at gcc dot gnu.org
  Target Milestone: ---

Created attachment 35789
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=35789&action=edit
test case

The test case is attached.

toolchain built from latest trunk code and branch 5 produce wrong
code-generation with the following command line option.

arm-none-eabi-gcc -march=armv7-a -mbig-endian -Os test.c -o test.out

The correct output should be:
checksum = ff

However, the result is:
checksum = 7

The testcase is correctly compiled at -O1, which gives the right execution
result. The test case works fine for little-endian at any optimization level.

[Bug rtl-optimization/66556] Wrong code-generation for armv7-a big-endian at -Os

[renlin at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66556

renlin at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |ASSIGNED
   Last reconfirmed|                            |2015-06-16
     Ever confirmed|0                           |1

[Bug rtl-optimization/66556] Wrong code-generation for armv7-a big-endian at -Os

[renlin at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66556

--- Comment #1 from renlin at gcc dot gnu.org ---
(insn 22 94 24 4 (set (reg:SI 140 [ g+2 ])
        (zero_extend:SI (mem/c:HI (post_modify:SI (reg/f:SI 156)
                    (plus:SI (reg/f:SI 156)
                        (const_int 20 [0x14]))) [5 g+4 S2 A32]))) test.c:36 159
{*arm_zero_extendhisi2_v6}
     (expr_list:REG_INC (reg/f:SI 156)
        (expr_list:REG_EQUAL (zero_extend:SI (mem/c:HI (const:SI (plus:SI
(symbol_ref:SI ("*.LANCHOR0") [flags 0x182])
                            (const_int 256 [0x100]))) [5 g+4 S2 A32]))
            (nil))))
(insn 24 22 25 4 (set (subreg:SI (reg:HI 141 [ D.4259 ]) 0)
        (zero_extract:SI (reg:SI 140 [ g+2 ])
            (const_int 15 [0xf])
            (const_int 1 [0x1]))) test.c:36 138 {extzv_t2}
     (expr_list:REG_DEAD (reg:SI 140 [ g+2 ])
        (nil)))
(insn 25 24 27 4 (set (reg:SI 142 [ D.4255 ])
        (zero_extend:SI (reg:HI 141 [ D.4259 ]))) test.c:36 159
{*arm_zero_extendhisi2_v6}
     (expr_list:REG_DEAD (reg:HI 141 [ D.4259 ])
        (nil)))
(insn 33 32 34 4 (set (reg:CC 100 cc)
        (compare:CC (reg:SI 142 [ D.4255 ])
            (reg:SI 150 [ D.4255 ]))) test.c:36 188 {*arm_cmpsi_insn}
     (expr_list:REG_DEAD (reg:SI 150 [ D.4255 ])
        (expr_list:REG_DEAD (reg:SI 142 [ D.4255 ])
            (nil))))
(insn 34 33 36 4 (set (reg:SI 152)
        (ltu:SI (reg:CC 100 cc)
            (const_int 0 [0]))) test.c:36 198 {*mov_scc}
     (expr_list:REG_DEAD (reg:CC 100 cc)
        (nil)))

In combine pass, the above rtx are simplified combined and insn 22, 24, 25, 33
are marked as deleted. However, the side-effect of insn 22, post_modify, is not
preserved.

(insn 43 41 45 4 (set (mem/c:HI (plus:SI (reg/f:SI 156)
                (const_int 8 [0x8])) [4 MEM[(short int *)&i + 8B]+0 S2 A16])
So for insn 43, the data is stored in the wrong place.

[Bug rtl-optimization/66556] Wrong code-generation for armv7-a big-endian at -Os

[segher at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66556

Segher Boessenkool <segher at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |segher at gcc dot gnu.org

--- Comment #2 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Confirmed.  The side effect goes away while combining 22,33,34.

[Bug rtl-optimization/66556] Wrong code-generation for armv7-a big-endian at -Os

[renlin at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66556

--- Comment #4 from renlin at gcc dot gnu.org ---
Author: renlin
Date: Wed Jul 15 15:13:36 2015
New Revision: 225835

URL: https://gcc.gnu.org/viewcvs?rev=225835&root=gcc&view=rev
Log:
[PATCH]Fix PR66556. Don't drop side-effect in
simplify_const_relational_operation function.

gcc/

        Backport from mainline.
        2015-07-13  Renlin Li  <renlin.li@arm.com>

        PR rtl/66556
        * simplify-rtx.c (simplify_const_relational_operation): Add
        side_effects_p checks.

gcc/testsuite/

        Backport from mainline.
        2015-07-13  Renlin Li  <renlin.li@arm.com>

        PR rtl/66556
        * gcc.c-torture/execute/pr66556.c: New.


Added:
    branches/gcc-5-branch/gcc/testsuite/gcc.c-torture/execute/pr66556.c
Modified:
    branches/gcc-5-branch/gcc/ChangeLog
    branches/gcc-5-branch/gcc/simplify-rtx.c
    branches/gcc-5-branch/gcc/testsuite/ChangeLog