[Bug target/67660] New: [SH] Automatically insert atomic rewind code into ISR prologue

[Bug target/67660] New: [SH] Automatically insert atomic rewind code into ISR prologue

[olegendo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67660

            Bug ID: 67660
           Summary: [SH] Automatically insert atomic rewind code into ISR
                    prologue
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: olegendo at gcc dot gnu.org
  Target Milestone: ---
            Target: sh*-*-*

This has been originally mentioned here
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=50457#c16

however it's not really SH2A specific, but rather specific to gUSA-like atomic
sequences which need rewinding.

The basic idea is to make the compiler automatically emit the proper atomic
rewind code into the ISR prologue, if it is actually needed.  For example, if
the ISR doesn't touch anything atomic and contains no function calls, it can be
omitted, in a similar way as it's done for FP regs save/store.

This can be useful for bare-metal systems when atomics are used to access
shared state from normal code and ISRs.  Probably the easiest way to do that is
via an additional function attribute, like "rewind_atomics".

[Bug target/67660] [SH] Automatically insert atomic rewind code into ISR prologue

[olegendo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67660

--- Comment #1 from Oleg Endo <olegendo at gcc dot gnu.org> ---
Just a note ...
It might also make sense to tell the compiler (via function attribute) whether
the ISR is re-entrant or not.  On a single-core system, atomic ops in an ISR
can be converted into normal load-modify-store ops if the ISR context can't be
interrupted.