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* [Bug rtl-optimization/82931] Missing Optimization for Bit-Transfer
[not found] <bug-82931-4@http.gcc.gnu.org/bugzilla/>
@ 2021-07-24 9:35 ` pinskia at gcc dot gnu.org
2023-05-25 17:07 ` cvs-commit at gcc dot gnu.org
` (3 subsequent siblings)
4 siblings, 0 replies; 5+ messages in thread
From: pinskia at gcc dot gnu.org @ 2021-07-24 9:35 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82931
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Component|middle-end |rtl-optimization
Severity|normal |enhancement
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug rtl-optimization/82931] Missing Optimization for Bit-Transfer
[not found] <bug-82931-4@http.gcc.gnu.org/bugzilla/>
2021-07-24 9:35 ` [Bug rtl-optimization/82931] Missing Optimization for Bit-Transfer pinskia at gcc dot gnu.org
@ 2023-05-25 17:07 ` cvs-commit at gcc dot gnu.org
2023-05-25 17:25 ` cvs-commit at gcc dot gnu.org
` (2 subsequent siblings)
4 siblings, 0 replies; 5+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2023-05-25 17:07 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82931
--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Georg-Johann Lay <gjl@gcc.gnu.org>:
https://gcc.gnu.org/g:ff0a6900700636ac4c7f40b88490a20d19a68db3
commit r14-1244-gff0a6900700636ac4c7f40b88490a20d19a68db3
Author: Georg-Johann Lay <avr@gjlay.de>
Date: Thu May 25 19:02:34 2023 +0200
target/82931: Make a pattern more generic to match more bit-transfers.
There is already a pattern in avr.md that matches single-bit transfers
from one register to another one, but it only handled bit 0 of 8-bit
registers. This change makes that pattern more generic so it matches
more of similar single-bit transfers.
gcc/
PR target/82931
* config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
Handle any bit position and use mode QISI.
* config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
of 2 insns for bit-transfer of respective style.
gcc/testsuite/
PR target/82931
* gcc.target/avr/pr82931.c: New test.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug rtl-optimization/82931] Missing Optimization for Bit-Transfer
[not found] <bug-82931-4@http.gcc.gnu.org/bugzilla/>
2021-07-24 9:35 ` [Bug rtl-optimization/82931] Missing Optimization for Bit-Transfer pinskia at gcc dot gnu.org
2023-05-25 17:07 ` cvs-commit at gcc dot gnu.org
@ 2023-05-25 17:25 ` cvs-commit at gcc dot gnu.org
2023-05-25 17:46 ` cvs-commit at gcc dot gnu.org
2023-05-25 18:09 ` gjl at gcc dot gnu.org
4 siblings, 0 replies; 5+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2023-05-25 17:25 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82931
--- Comment #6 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-13 branch has been updated by Georg-Johann Lay
<gjl@gcc.gnu.org>:
https://gcc.gnu.org/g:a499ab08d18eff4ca9c079cafaee0708d2bcbf20
commit r13-7377-ga499ab08d18eff4ca9c079cafaee0708d2bcbf20
Author: Georg-Johann Lay <avr@gjlay.de>
Date: Thu May 25 19:02:34 2023 +0200
target/82931: Make a pattern more generic to match more bit-transfers.
There is already a pattern in avr.md that matches single-bit transfers
from one register to another one, but it only handled bit 0 of 8-bit
registers. This change makes that pattern more generic so it matches
more of similar single-bit transfers.
gcc/
PR target/82931
* config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
Handle any bit position and use mode QISI.
* config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
of 2 insns for bit-transfer of respective style.
gcc/testsuite/
PR target/82931
* gcc.target/avr/pr82931.c: New test.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug rtl-optimization/82931] Missing Optimization for Bit-Transfer
[not found] <bug-82931-4@http.gcc.gnu.org/bugzilla/>
` (2 preceding siblings ...)
2023-05-25 17:25 ` cvs-commit at gcc dot gnu.org
@ 2023-05-25 17:46 ` cvs-commit at gcc dot gnu.org
2023-05-25 18:09 ` gjl at gcc dot gnu.org
4 siblings, 0 replies; 5+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2023-05-25 17:46 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82931
--- Comment #7 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-12 branch has been updated by Georg-Johann Lay
<gjl@gcc.gnu.org>:
https://gcc.gnu.org/g:4d39f68b891ed2ac7aca5ef24119f50976b84c22
commit r12-9654-g4d39f68b891ed2ac7aca5ef24119f50976b84c22
Author: Georg-Johann Lay <avr@gjlay.de>
Date: Thu May 25 19:02:34 2023 +0200
target/82931: Make a pattern more generic to match more bit-transfers.
There is already a pattern in avr.md that matches single-bit transfers
from one register to another one, but it only handled bit 0 of 8-bit
registers. This change makes that pattern more generic so it matches
more of similar single-bit transfers.
gcc/
PR target/82931
* config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
Handle any bit position and use mode QISI.
* config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
of 2 insns for bit-transfer of respective style.
gcc/testsuite/
PR target/82931
* gcc.target/avr/pr82931.c: New test.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug rtl-optimization/82931] Missing Optimization for Bit-Transfer
[not found] <bug-82931-4@http.gcc.gnu.org/bugzilla/>
` (3 preceding siblings ...)
2023-05-25 17:46 ` cvs-commit at gcc dot gnu.org
@ 2023-05-25 18:09 ` gjl at gcc dot gnu.org
4 siblings, 0 replies; 5+ messages in thread
From: gjl at gcc dot gnu.org @ 2023-05-25 18:09 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82931
Georg-Johann Lay <gjl at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |RESOLVED
Resolution|--- |FIXED
--- Comment #8 from Georg-Johann Lay <gjl at gcc dot gnu.org> ---
Should work in v12.4 and v13.2+.
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2023-05-25 18:09 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2021-07-24 9:35 ` [Bug rtl-optimization/82931] Missing Optimization for Bit-Transfer pinskia at gcc dot gnu.org
2023-05-25 17:07 ` cvs-commit at gcc dot gnu.org
2023-05-25 17:25 ` cvs-commit at gcc dot gnu.org
2023-05-25 17:46 ` cvs-commit at gcc dot gnu.org
2023-05-25 18:09 ` gjl at gcc dot gnu.org
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