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* [Bug inline-asm/85185] Wider-than-expected load for struct member used as operand of inline-asm with memory clobber at -Og
       [not found] <bug-85185-4@http.gcc.gnu.org/bugzilla/>
@ 2018-12-06 16:12 ` segher at gcc dot gnu.org
  2021-04-21 19:31 ` pinskia at gcc dot gnu.org
  2021-09-14 19:34 ` [Bug c/85185] " segher at gcc dot gnu.org
  2 siblings, 0 replies; 3+ messages in thread
From: segher at gcc dot gnu.org @ 2018-12-06 16:12 UTC (permalink / raw)
  To: gcc-bugs

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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85185

Segher Boessenkool <segher at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |segher at gcc dot gnu.org

--- Comment #8 from Segher Boessenkool <segher at gcc dot gnu.org> ---
I think it is still possible to make code for which LRA cannot create any valid
allocation, just not using function parameters.  Which is the only sane way to
get in such a situation, of course.
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From: "jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug c/88363] [9 Regression] alloc_align attribute doesn't accept enumerated arguments
Date: Thu, 06 Dec 2018 16:23:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88363

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

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                 CC|                            |jakub at gcc dot gnu.org

--- Comment #3 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
I think it is irrelevant what exact types the standards call integer types for
how we define our extension, and it is irrelevant on how LLVM implemented it,
they implemented many GNU extensions incorrectly.

What matters is what makes sense.  For these kinds of attributes (alloc_align,
alloc_size) we are looking for a parameter that meaningfully will hold either a
size or alignment.  Supporting bool/_Bool for that kind of argument makes no
sense, enums are borderline, though I'd say it is fine to warn about them.

So I'd recommend just to add testcases that cover this behavior and close.
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Subject: [Bug target/88234] UBsan and runtime error: signed integer overflow using unsigned vector
Date: Thu, 06 Dec 2018 16:24:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88234

Segher Boessenkool <segher at gcc dot gnu.org> changed:

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--- Comment #14 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Closing then.
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Subject: [Bug inline-asm/87733] local register variable not honored with earlyclobber
Date: Thu, 06 Dec 2018 16:26:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87733

Segher Boessenkool <segher at gcc dot gnu.org> changed:

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--- Comment #1 from Segher Boessenkool <segher at gcc dot gnu.org> ---
This is fixed on trunk.  Peter, does that need a backport still?
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Subject: [Bug c/88382] undocumented GNU C extension: C++ raw string literals permitted in GNU C
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88382

--- Comment #2 from joseph at codesourcery dot com <joseph at codesourcery dot com> ---
The extension is intentionally supported.  Thus, it should be documented.
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Subject: [Bug tree-optimization/88285] [9 Regression] gcc.dg/predict-22.c fails on arm
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88285

Jeffrey A. Law <law at redhat dot com> changed:

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--- Comment #3 from Jeffrey A. Law <law at redhat dot com> ---
Fixed by Jakub's commit on the trunk.
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Subject: [Bug c++/87935] [9 regression] new failures on arm since r265788
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87935

Jeffrey A. Law <law at redhat dot com> changed:

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From: "emmanuel.le-trong@cnrs-orleans.fr" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug c++/88395] New: ICE: Segmentation fault signal terminated program cc1plus, with -std=c++2a -fconcepts
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88395

            Bug ID: 88395
           Summary: ICE: Segmentation fault signal terminated program
                    cc1plus, with -std=c++2a -fconcepts
           Product: gcc
           Version: 9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c++
          Assignee: unassigned at gcc dot gnu.org
          Reporter: emmanuel.le-trong@cnrs-orleans.fr
  Target Milestone: ---

Both trunk and 8.2.1 segfault on this valid snippet

$ cat bug_4.cpp
    template <class T, class U>
    concept bool Concept2 = requires (T t, U u)
    {
        { t += u } -> T&;
    };

    template <class T>
    concept bool Concept = Concept2 <T, T>;

    struct S
    {
        template <Concept T>
        constexpr S& operator += (T o);
    };
    constexpr S operator * (S a, S b)
    {
        return a += b;
    }



$ g++-9 -std=c++2a -fconcepts -c bug_4.cpp
g++-9: internal compiler error: Segmentation fault signal terminated program
cc1plus
Please submit a full bug report,
with preprocessed source if appropriate.
See <https://gcc.gnu.org/bugs/> for instructions.

$ g++-9 -v
Using built-in specs.
COLLECT_GCC=g++-9
COLLECT_LTO_WRAPPER=/home/manu/system/opt/gcc-9/libexec/gcc/x86_64-pc-linux-gnu/9.0.0/lto-wrapper
Target: x86_64-pc-linux-gnu
Configured with: ../gcc-9/configure --prefix=/home/manu/system/opt/gcc-9
--program-suffix=-9
Thread model: posix
gcc version 9.0.0 20181204 (experimental) (GCC)
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Subject: [Bug c/88363] [9 Regression] alloc_align attribute doesn't accept enumerated arguments
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88363

Martin Sebor <msebor at gcc dot gnu.org> changed:

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--- Comment #4 from Martin Sebor <msebor at gcc dot gnu.org> ---
I'll take care of this.
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88372

Martin Sebor <msebor at gcc dot gnu.org> changed:

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--- Comment #3 from Martin Sebor <msebor at gcc dot gnu.org> ---
Testing a patch.
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Subject: [Bug libstdc++/87787] [9 Regression][UBSAN] runtime error: null pointer passed as argument 2, which is declared to never be null
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87787

Jeffrey A. Law <law at redhat dot com> changed:

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--- Comment #8 from Jeffrey A. Law <law at redhat dot com> ---
Jon, did you have a chance to dig into the questions from c#2 yet?
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Subject: [Bug target/86393] GCC-8 appears to not detect AVX512 on iMac Pro 2018
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86393

--- Comment #7 from MCCCS <mcccs at gmx dot com> ---
The problem was that the LLVM assembler required -mavx512f. I've researched it
and found that this LLVM bug was fixed months and shipped with LLVM 7. Apple
updates Xcode's LLVM with one year delay, and it should be fixed the next year
with 10.15.

To sum up: this is llvm 6 bug

https://bugs.llvm.org/show_bug.cgi?id=36202
https://llvm.org/viewvc/llvm-project?view=revision&revision=324106
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Subject: [Bug libstdc++/87787] [9 Regression][UBSAN] runtime error: null pointer passed as argument 2, which is declared to never be null
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--- Comment #9 from Jonathan Wakely <redi at gcc dot gnu.org> ---
Not yet, sorry.
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Subject: [Bug inline-asm/87733] local register variable not honored with earlyclobber
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87733

--- Comment #2 from Peter Bergner <bergner at gcc dot gnu.org> ---
None of my recent IRA or LRA patches were back ported and I wasn't planning on
it, given the fallout they caused.  Do we know for sure this doesn't work on
GCC 8?

Given when Alexander opened this bug, I'm guessing he just got caught in the
middle of all of my changes.  If this works on GCC 8, we can probably just
close that as already fixed.
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88234

Segher Boessenkool <segher at gcc dot gnu.org> changed:

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--- Comment #15 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Oh sorry, backports are still pending.  Reopening.
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Subject: [Bug sanitizer/80953] Support libsanitizer on Solaris
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--- Comment #25 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
> It is definitely used, same as on Solaris/x86 where this issue doesn't
> occur.

Maybe related to delay slots then.
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Subject: [Bug sanitizer/80953] Support libsanitizer on Solaris
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--- Comment #26 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Try -fno-delayed-branch then?  The debug info and unwind info for delayed slots
isn't really well defined...
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Subject: [Bug target/88271] Omit test instruction after add
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Jakub Jelinek <jakub at gcc dot gnu.org> changed:

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                 CC|                            |jakub at gcc dot gnu.org

--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
GCC can handle these in the combiner, but for that needs the two instructions
(add, etc. or in this case left shift by 1) be in the same basic block as the
comparison.  That is not the case here, during combine the shift by 1 is in one
bb, which jumps to another bb in which is the comparison, but that other bb is
preceded also by the bb with just val = data[level];  We only duplicate the
comparison late and we really can't use the combiner late after RA.
So, I'm afraid it is too hard to do anything here and the benefit would be
small.
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87733

Segher Boessenkool <segher at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2018-12-06
     Ever confirmed|0                           |1

--- Comment #3 from Segher Boessenkool <segher at gcc dot gnu.org> ---
It fails on everything at least as far back as GCC 5.  So it is not a
regression.  I'd say we don't backport your changes, given how hard it
is to get it right, and no doubt it will need changes to backport, too.
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Subject: [Bug tree-optimization/85804] [8/9 Regression][AArch64] Mis-compilation of loop with strided array access and xor reduction
Date: Thu, 06 Dec 2018 17:21:00 -0000
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--- Comment #7 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
FYI, this used to work fine before r256634 with which it started to ICE:
pr85804.c: In function ‘main’:
pr85804.c:4:5: internal compiler error: in vect_permute_load_chain, at
tree-vect-data-refs.c:5511
 int main() {
     ^~~~
Starting with r257492 we don't ICE anymore, but miscompile it.
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Subject: [Bug tree-optimization/88214] ICE in bitmap_intersect_p() on 32-bit BE platforms
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--- Comment #4 from Martin Jambor <jamborm at gcc dot gnu.org> ---
I don't think this has much to do with IPA-CP per se.  What is
happening is that call_may_clobber_ref_p_1 extracts SSA_NAME_PTR_INFO
of an SSA_NAME that is a base of a MEM_REF and runs
pt_solutions_intersect on it, but the SSA_NAME_PTR_INFO just has
invalid pt.vars bitmap address 0xffffffffffff8000 in it (before IPA-CP
changed anything).

When I set a watch in gdb to find out how the value got there, it
turned out to be from a rather unexpected context:

Watchpoint 5: ((ptr_info_def *) 0x3fffaf246e20)->pt.vars

Old value = (bitmap) 0xafafafafafafafaf
New value = (bitmap) 0xffffffffffff8000
wi::copy<trailing_wide_int_storage,
generic_wide_int<wide_int_ref_storage<false, true> > > (x=..., y=...)
    at /home/jamborm/gcc/mine/src/gcc/wide-int.h:1776
1776      do
(gdb) bt
#0  wi::copy<trailing_wide_int_storage,
generic_wide_int<wide_int_ref_storage<false, true> > > (x=..., y=...)
    at /home/jamborm/gcc/mine/src/gcc/wide-int.h:1776
#1  0x00000000112eea1c in
trailing_wide_int_storage::operator=<generic_wide_int<wide_int_ref_storage<false,
true> > > (this=0x3fffffffd920, x=...) at
/home/jamborm/gcc/mine/src/gcc/wide-int.h:1432
#2  0x00000000112edff8 in
generic_wide_int<trailing_wide_int_storage>::operator=<generic_wide_int<wide_int_ref_storage<false,
true> > > (this=0x3fffffffd920, x=...) at
/home/jamborm/gcc/mine/src/gcc/wide-int.h:916
#3  0x00000000112ed96c in
range_info_def::set_min<generic_wide_int<wide_int_ref_storage<false, true> > >
(
    this=0x3fffaf246e20, x=...) at
/home/jamborm/gcc/mine/src/gcc/tree-ssanames.h:52
#4  0x00000000112ea434 in set_range_info_raw (name=<ssa_name 0x3fffaf2e0990>,
range_type=VR_RANGE, min=..., 
    max=...) at /home/jamborm/gcc/mine/src/gcc/tree-ssanames.c:360
#5  0x00000000112ea91c in set_range_info (name=<ssa_name 0x3fffaf2e0990>,
range_type=VR_RANGE, min=..., 
    max=...) at /home/jamborm/gcc/mine/src/gcc/tree-ssanames.c:398
#6  0x0000000011c25b44 in evrp_range_analyzer::set_ssa_range_info
(this=0x3fffffffe0f8, 
    lhs=<ssa_name 0x3fffaf2e0990>, vr=0x3fffffffddb0)
    at /home/jamborm/gcc/mine/src/gcc/gimple-ssa-evrp-analyze.c:116
#7  0x0000000011c26a18 in evrp_range_analyzer::record_ranges_from_stmt
(this=0x3fffffffe0f8, 
    stmt=0x3fffaf43e290, temporary=false) at
/home/jamborm/gcc/mine/src/gcc/gimple-ssa-evrp-analyze.c:312
#8  0x0000000011c22ab4 in evrp_dom_walker::before_dom_children
(this=0x3fffffffe0c0, bb=0x3fffaf450138)
    at /home/jamborm/gcc/mine/src/gcc/gimple-ssa-evrp.c:139
#9  0x0000000011bdc634 in dom_walker::walk (this=0x3fffffffe0c0,
bb=0x3fffaf450138)
    at /home/jamborm/gcc/mine/src/gcc/domwalk.c:353
#10 0x0000000011c23448 in execute_early_vrp () at
/home/jamborm/gcc/mine/src/gcc/gimple-ssa-evrp.c:311
#11 0x0000000011c235f0 in (anonymous namespace)::pass_early_vrp::execute
(this=0x1282aed0)
    at /home/jamborm/gcc/mine/src/gcc/gimple-ssa-evrp.c:348

That looks like some memory corruption or unwanted memory sharing...?
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Jakub Jelinek <jakub at gcc dot gnu.org> changed:

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   Target Milestone|---                         |8.3
     Ever confirmed|0                           |1

--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Started with r253265.
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Subject: [Bug middle-end/85881] [9 Regression] FAIL: g++.dg/pr80481.C  -std=gnu++11  scan-assembler-not vmovaps
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Jeffrey A. Law <law at redhat dot com> changed:

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--- Comment #7 from Jeffrey A. Law <law at redhat dot com> ---
This was fixed by Richi's out-of-ssa changes for pr70359 and 86270.
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Subject: [Bug inline-asm/87733] local register variable not honored with earlyclobber
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--- Comment #4 from Peter Bergner <bergner at gcc dot gnu.org> ---
Ok, so we can mark this as already fixed then and leave it at that.  That's
fine with me.
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Subject: [Bug rtl-optimization/87763] [9 Regression] aarch64 target testcases fail after r265398
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Jakub Jelinek <jakub at gcc dot gnu.org> changed:

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--- Comment #8 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Well, you can have different alternatives for different microarchitectures if
that is beneficial, just enable/disable those through enabled attribute.
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Subject: [Bug target/86753] [9 Regression] gcc.target/aarch64/sve/vcond_[45].c fail after recent combine patch
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Jeffrey A. Law <law at redhat dot com> changed:

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--- Comment #4 from Jeffrey A. Law <law at redhat dot com> ---
Per Richard's c#2, the ultimate result is actually an improvement and Richard
has twiddled the tests.

WRT c#3, reports of problems on Haswell, if this is still an issue, please
report it as a separate bug.
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Subject: [Bug inline-asm/87733] local register variable not honored with earlyclobber
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87733

Segher Boessenkool <segher at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|---                         |FIXED
   Target Milestone|---                         |9.0

--- Comment #5 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Fixed on trunk.
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Subject: [Bug tree-optimization/88214] ICE in bitmap_intersect_p() on 32-bit BE platforms
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--- Comment #5 from Martin Jambor <jamborm at gcc dot gnu.org> ---
OK, I take it all back.  SSA_NAME_RANGE_INFO and SSA_NAME_PTR_INFO
share storage by design, the latter should not be accessed because the
SSA_NAME is an integer but it still happens to be a base in a MEM_REF
constructed as a part of ao_ref_init_from_ptr_and_size done during
ipa-prop's function scan.  So hopefully all is missing is a
POINTER_TYPE_P somewhere.
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Subject: [Bug libstdc++/88374] crash when stepping into for loop where iterators are created and compared with gdb
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--- Comment #2 from Bob Steagall <bob.steagall.cpp at gmail dot com> ---
See https://sourceware.org/bugzilla/show_bug.cgi?id=20020, especially comment 7
for more data.
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Subject: [Bug inline-asm/55681] Qualifiers on asm statements are order-dependent
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55681

--- Comment #5 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Author: segher
Date: Thu Dec  6 17:47:52 2018
New Revision: 266859

URL: https://gcc.gnu.org/viewcvs?rev=266859&root=gcc&view=rev
Log:
asm qualifiers (PR55681)

PR55681 observes that currently only one qualifier is allowed for
inline asm, so that e.g. "volatile asm" is allowed, "const asm" is also
okay (with a warning), but "const volatile asm" gives an error.  Also
"goto" has to be last.

This patch changes things so that only "asm-qualifiers" are allowed,
that is "volatile" and "goto", in any combination, in any order, but
without repetitions.


        PR inline-asm/55681
        * doc/extend.texi (Basic Asm): Update grammar.
        (Extended Asm): Update grammar.

gcc/c/
        PR inline-asm/55681
        * c-parser.c (c_parser_asm_statement): Update grammar.  Allow any
        combination of volatile and goto, in any order, without repetitions.

gcc/cp/
        PR inline-asm/55681
        * parser.c (cp_parser_asm_definition): Update grammar.  Allow any
        combination of volatile and goto, in any order, without repetitions.

gcc/testsuite/
        PR inline-asm/55681
        * gcc.dg/asm-qual-1.c: Test that "const" and "restrict" are refused.
        * gcc.dg/asm-qual-2.c: New test, test that asm-qualifiers are allowed
        in any order, but that duplicates are not allowed.

Added:
    trunk/gcc/testsuite/gcc.dg/asm-qual-2.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/c/ChangeLog
    trunk/gcc/c/c-parser.c
    trunk/gcc/cp/ChangeLog
    trunk/gcc/cp/parser.c
    trunk/gcc/doc/extend.texi
    trunk/gcc/testsuite/ChangeLog
    trunk/gcc/testsuite/gcc.dg/asm-qual-1.c
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87733

--- Comment #6 from Alexander Monakov <amonakov at gcc dot gnu.org> ---
If this is fixed then the testcase should be added to the testsuite to make
sure we catch it if we regress again (this worked before e.g. on gcc-4.1).

Peter, can you please clarify, is this actually fixed (as in, one of your
patches addressed this particular issue) or just happens to be not reproducible
anymore?
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Subject: [Bug target/85593] [7/8/9 Regression] GCC on ARM allocates R3 for local variable when calling naked function with O2 optimizations enabled
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Jakub Jelinek <jakub at gcc dot gnu.org> changed:

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                 CC|                            |jakub at gcc dot gnu.org

--- Comment #12 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Generic code already checks "naked" attribute in a bunch of places, no need to
add a target hook IMHO.
attribs.c:  /* A "naked" function attribute implies "noinline" and "noclone"
for
attribs.c:      && lookup_attribute ("naked", attributes) != NULL
attribs.c:      && lookup_attribute_spec (get_identifier ("naked")))
bb-reorder.c:     && !lookup_attribute ("naked", DECL_ATTRIBUTES (fun->decl))
cfgexpand.c:          if (lookup_attribute ("naked",
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Subject: [Bug target/87369] [9 Regression] Regression on aarch64/copysign-bsl.c since r264264
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Jeffrey A. Law <law at redhat dot com> changed:

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--- Comment #7 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Feel free to send a patch.

Yes it is fixed.
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Subject: [Bug tree-optimization/88214] ICE in bitmap_intersect_p() on 32-bit BE platforms
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--- Comment #6 from Martin Jambor <jamborm at gcc dot gnu.org> ---
I'm going to test the following fix:

diff --git a/gcc/ipa-prop.c b/gcc/ipa-prop.c
index 7405235..4dbe268 100644
--- a/gcc/ipa-prop.c
+++ b/gcc/ipa-prop.c
@@ -1569,7 +1569,8 @@ determine_locally_known_aggregate_parts (gcall *call,
tree arg,
       if (TREE_CODE (arg) == SSA_NAME)
        {
          tree type_size;
-          if (!tree_fits_uhwi_p (TYPE_SIZE (TREE_TYPE (arg_type))))
+          if (!tree_fits_uhwi_p (TYPE_SIZE (TREE_TYPE (arg_type)))
+             || !POINTER_TYPE_P (TREE_TYPE (arg)))
             return;
          check_ref = true;
          arg_base = arg;
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Subject: [Bug target/87369] [9 Regression] Regression on aarch64/copysign-bsl.c since r264264
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87369

--- Comment #1 from Jeffrey A. Law <law at redhat dot com> ---
I wonder if we would be better off having the bfxil pattern reject cases when
just the high bit is on (which are those cases where we'd be able to use a bit
instruction rather than bfxil.
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Subject: [Bug c++/78022] constexpr int template rejected unless constructor is used before hand
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Marek Polacek <mpolacek at gcc dot gnu.org> changed:

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--- Comment #6 from Marek Polacek <mpolacek at gcc dot gnu.org> ---
That was fixed by r261084.
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Subject: [Bug target/88282] [9 Regression] ICE in df_install_refs at gcc/df-scan.c:2379
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--- Comment #9 from Vladimir Makarov <vmakarov at gcc dot gnu.org> ---
Author: vmakarov
Date: Thu Dec  6 18:41:46 2018
New Revision: 266862

URL: https://gcc.gnu.org/viewcvs?rev=266862&root=gcc&view=rev
Log:
2018-12-06  Vladimir Makarov  <vmakarov@redhat.com>

        PR target/88282
        * ira.c (ira_init_register_move_cost): Use info from
        hard_regno_mode_ok instead of contains_reg_of_mode.
        * ira-costs.c (contains_reg_of_mode): Don't use cost from bigger
        hard register class for some fixed hard registers.


Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/ira-costs.c
    trunk/gcc/ira.c
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--- Comment #7 from Marek Polacek <mpolacek at gcc dot gnu.org> ---
Or, let's say, started to be accepted.
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Thomas Koenig <tkoenig at gcc dot gnu.org> changed:

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Subject: [Bug target/85593] [7/8/9 Regression] GCC on ARM allocates R3 for local variable when calling naked function with O2 optimizations enabled
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Jakub Jelinek <jakub at gcc dot gnu.org> changed:

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--- Comment #13 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Created attachment 45173
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=45173&action=edit
gcc9-pr85593.patch

Untested fix.
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Subject: [Bug inline-asm/87733] local register variable not honored with earlyclobber
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--- Comment #8 from Peter Bergner <bergner at gcc dot gnu.org> ---
(In reply to Alexander Monakov from comment #6)
> Peter, can you please clarify, is this actually fixed (as in, one of your
> patches addressed this particular issue) or just happens to be not
> reproducible anymore?

Segher and I had patches to combine and RA respectively that addressed this
specific issue.
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Subject: [Bug sanitizer/80953] Support libsanitizer on Solaris
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--- Comment #27 from ro at CeBiTec dot Uni-Bielefeld.DE <ro at CeBiTec dot Uni-Bielefeld.DE> ---
> --- Comment #26 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
> Try -fno-delayed-branch then?  The debug info and unwind info for delayed slots
> isn't really well defined...

For a quick check, I just tried it on
c-c++-common/asan/heap-overflow-1.c at -O0

    #0 0x11258 in main
/vol/gcc/src/hg/trunk/local/gcc/testsuite/c-c++-common/asan/heap-overflow-1.c:21

vs. -O1:

    #0 0x1121c in main
/vol/gcc/src/hg/trunk/local/gcc/testsuite/c-c++-common/asan/heap-overflow-1.c:24

-fno-delayed-branch made no difference.
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84345

--- Comment #5 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Do we actually care about these now that we have gcc_qsort?
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Subject: [Bug libstdc++/64883] FAIL: 17_intro/headers/c++*/all_attributes.cc (test for excess errors) on x86_64-apple-darwin10
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64883

--- Comment #58 from Iain Sandoe <iains at gcc dot gnu.org> ---
Author: iains
Date: Thu Dec  6 19:21:32 2018
New Revision: 266863

URL: https://gcc.gnu.org/viewcvs?rev=266863&root=gcc&view=rev
Log:
Fix PR libstdc++/64883 Darwin headers use always_inline so don't test that

    Because darwin system headers use always_inline rather than
    __always_inline__ the libstdc++ test will fail, even if our headers only
    use the reserved form of the attribute. Don't test it on Darwin, and
    assume that testing on other targets will catch any accidental misuses
    in libstdc++ headers.

2018-12-06  Jonathan Wakely  <jwakely@redhat.com>
            Iain Sandoe  <iain@sandoe.co.uk>

            PR libstdc++/64883
            * testsuite/17_intro/headers/c++1998/all_attributes.cc: Don't test
            always_inline on Darwin.
            * testsuite/17_intro/headers/c++2011/all_attributes.cc: Likewise.
            * testsuite/17_intro/headers/c++2014/all_attributes.cc: Likewise.
            * testsuite/17_intro/headers/c++2017/all_attributes.cc: Likewise.
            * testsuite/17_intro/headers/c++2020/all_attributes.cc: Likewise.


Modified:
    trunk/libstdc++-v3/ChangeLog
    trunk/libstdc++-v3/testsuite/17_intro/headers/c++1998/all_attributes.cc
    trunk/libstdc++-v3/testsuite/17_intro/headers/c++2011/all_attributes.cc
    trunk/libstdc++-v3/testsuite/17_intro/headers/c++2014/all_attributes.cc
    trunk/libstdc++-v3/testsuite/17_intro/headers/c++2017/all_attributes.cc
    trunk/libstdc++-v3/testsuite/17_intro/headers/c++2020/all_attributes.cc
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Subject: [Bug libstdc++/85145] [8/9 Regression] include_next broken icw/ --with-gxx-include-dir
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Jakub Jelinek <jakub at gcc dot gnu.org> changed:

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                 CC|                            |jakub at gcc dot gnu.org

--- Comment #5 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
So, what directories are searched if you configure g++ this way, in what order
and where is stdlib.h available?

echo '#include <cstdlib>' > test.C
g++ -v -E -o test.ii test.C

should print that kind of info (except for where stdlib.h actually is).
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Subject: [Bug target/88271] Omit test instruction after add
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--- Comment #3 from Daniel Fruzynski <bugzilla@poradnik-webmastera.com> ---
What about adding new pass at the end? It would look for various possible
optimizations, which were missed earlier because they are cross-basic block.

In my case this example code is part of tight loop. From previous experiences
with it I expect that this optimization could improve speed by something like
0.5%-1%. If you want to look on real code, is it at link below. CPU spends
about 60% of time in this one function. This app runs on BOINC platform, so
such microoptimization would be worthwhile there.

https://github.com/sirzooro/RakeSearch/blob/optimizations2/RakeDiagSearch/RakeDiagSearch/MovePairSearch.cpp#L583
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Subject: [Bug c++/88373] [9 Regression] parse error in template argument list when using bitwise not with -std=c++2a switch
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--- Comment #2 from Marek Polacek <mpolacek at gcc dot gnu.org> ---
Author: mpolacek
Date: Thu Dec  6 19:43:17 2018
New Revision: 266865

URL: https://gcc.gnu.org/viewcvs?rev=266865&root=gcc&view=rev
Log:
        PR c++/88373 - wrong parse error with ~.
        * parser.c (cp_parser_template_name): Check tag_type for
        none_type.

        * g++.dg/cpp2a/fn-template19.C: New test.

Added:
    trunk/gcc/testsuite/g++.dg/cpp2a/fn-template19.C
Modified:
    trunk/gcc/cp/ChangeLog
    trunk/gcc/cp/parser.c
    trunk/gcc/testsuite/ChangeLog
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Subject: [Bug c++/88373] [9 Regression] parse error in template argument list when using bitwise not with -std=c++2a switch
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Marek Polacek <mpolacek at gcc dot gnu.org> changed:

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--- Comment #3 from Marek Polacek <mpolacek at gcc dot gnu.org> ---
Fixed, thanks for the report.
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Subject: [Bug target/86393] GCC-8 appears to not detect AVX512 on iMac Pro 2018
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Eric Gallager <egallager at gcc dot gnu.org> changed:

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                 CC|                            |iains at gcc dot gnu.org
           See Also|                            |https://bugs.llvm.org/show_
                   |                            |bug.cgi?id=36202

--- Comment #8 from Eric Gallager <egallager at gcc dot gnu.org> ---
(In reply to MCCCS from comment #7)
> The problem was that the LLVM assembler required -mavx512f. I've researched
> it and found that this LLVM bug was fixed months and shipped with LLVM 7.
> Apple updates Xcode's LLVM with one year delay, and it should be fixed the
> next year with 10.15.
> 
> To sum up: this is llvm 6 bug
> 
> https://bugs.llvm.org/show_bug.cgi?id=36202
> https://llvm.org/viewvc/llvm-project?view=revision&revision=324106

It still might be worth handling this on the GCC end in the meantime though.
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Subject: [Bug sanitizer/80953] Support libsanitizer on Solaris
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--- Comment #28 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
> For a quick check, I just tried it on
> c-c++-common/asan/heap-overflow-1.c at -O0
> 
>     #0 0x11258 in main
> /vol/gcc/src/hg/trunk/local/gcc/testsuite/c-c++-common/asan/heap-overflow-1.
> c:21
> 
> vs. -O1:
> 
>     #0 0x1121c in main
> /vol/gcc/src/hg/trunk/local/gcc/testsuite/c-c++-common/asan/heap-overflow-1.
> c:24
> 
> -fno-delayed-branch made no difference.

What about -fasynchronous-unwind-tables?
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Subject: [Bug c++/87380] Explicit instantations should use weak symbols on darwin
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87380

--- Comment #19 from Iain Sandoe <iains at gcc dot gnu.org> ---
Author: iains
Date: Thu Dec  6 20:09:26 2018
New Revision: 266866

URL: https://gcc.gnu.org/viewcvs?rev=266866&root=gcc&view=rev
Log:
Darwin - fix PR c++/87380

This is [intentionally] broken C++ ABI, that was catering for a
tool problem that existed in a very old Darwin toolchain.

The issue is not present after Darwin7 (using default system
tools) so confine the fix to that revision or earlier.

2018-12-06  Iain Sandoe  <iain@sandoe.co.uk>

        PR c++/87380
        * config/darwin.h (TARGET_WEAK_NOT_IN_ARCHIVE_TOC) Remove; use the
        default.
        * config/rs6000/darwin7.h (TARGET_WEAK_NOT_IN_ARCHIVE_TOC): New.


Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/darwin.h
    trunk/gcc/config/rs6000/darwin7.h
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Subject: [Bug tree-optimization/88240] Potential optimization bug: invalid pre-load of floating-point value could cause SIGFPE-underflow if value is integer
Date: Thu, 06 Dec 2018 20:11:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88240

--- Comment #10 from Thomas De Schampheleire <patrickdepinguin at gmail dot com> ---
I was able to further investigate and reduce the problem.
Qemu is now out of the picture, I can reproduce the issue directly on a real
CPU. All I need to do is enable the 'underflow' exception bit using
feenableexcept. Note that, as you will see below in the gdb output, the
denormal exception is not enabled.

Toolchain is still the same: gcc 7.3.0, glibc 2.27, binutils 2.30. See details
in bug description.

Below is the simplified test program, based on [1] with the addition of the
exception enabling code.


#define _GNU_SOURCE
#include <stdio.h>
#include <sqlite3.h>
#include <fenv.h>

static int callback(void *NotUsed, int argc, char **argv, char **azColName){
  int i;
  for(i=0; i<argc; i++){
    printf("%s = %s\n", azColName[i], argv[i] ? argv[i] : "NULL");
  }
  printf("\n");
  return 0;
}

int main(int argc, char **argv){
  sqlite3 *db;
  char *zErrMsg = 0;
  int rc;

  if( argc!=4 ){
    fprintf(stderr, "Usage: %s EXCEPTIONS DATABASE SQL-STATEMENT\n", argv[0]);
    return(1);
  }

  // <<<<<<<<<<<< This code added to allow enabling exceptions

  unsigned short fctrl = 0;
  if (argv[1][0] == '1') {
      printf("Enabling exception: FE_UNDERFLOW\n");
      feenableexcept(FE_UNDERFLOW);
  }
  else {
      printf("Not enabling exceptions.\n");
  }
  asm volatile("fstcw %0" : "=m" (fctrl) );
  printf("fctrl = %04x\n", fctrl);

  // >>>>>>>>>>>>>>>>>>>>> end of added code

  rc = sqlite3_open(argv[2], &db);
  if( rc ){
    fprintf(stderr, "Can't open database: %s\n", sqlite3_errmsg(db));
    sqlite3_close(db);
    return(1);
  }
  rc = sqlite3_exec(db, argv[3], callback, 0, &zErrMsg);
  if( rc!=SQLITE_OK ){
    fprintf(stderr, "SQL error: %s\n", zErrMsg);
    sqlite3_free(zErrMsg);
  }
  sqlite3_close(db);
  return 0;
}


I compiled this code and sqlite3 (version 3210000, but I don't think the exact
version matters much) with the mentioned toolchain.

Compilation command used for the test program:
/home/tdescham/repo/isam/buildroot-qemu/output/host/opt/ext-toolchain/bin/i686-pc-linux-gnu-gcc
--sysroot
/home/tdescham/repo/isam/buildroot-qemu/output/host/i686-buildroot-linux-gnu/sysroot
-march=pentiumpro -o sqlite-test sqlite-test.c -lsqlite3 -lm -g -O0

To reproduce, first create a simple database, not yet enabling exceptions:

$ env
LD_LIBRARY_PATH=/home/tdescham/repo/isam/buildroot-qemu/output/staging/usr/lib
./sqlite-test 0 /tmp/foo.db "create table foobar (id int primary key, name
text)"
Not enabling exceptions.
fctrl = 037f


Now, we can trigger the bug by showing some SQL output, if we enable the
underflow exception:

$ env
LD_LIBRARY_PATH=/home/tdescham/repo/isam/buildroot-qemu/output/staging/usr/lib
./sqlite-test 1 /tmp/foo.db "select sql from sqlite_master where sql not NULL;"
Enabling exception: FE_UNDERFLOW
fctrl = 036f
fish: Job 2, 'env LD_LIBRARY_PATH=/home/tdesc…' terminated by signal SIGFPE
(Floating point exception)


If we do not enable the underflow exception, everything is fine:

$ env
LD_LIBRARY_PATH=/home/tdescham/repo/isam/buildroot-qemu/output/staging/usr/lib
./sqlite-test 0 /tmp/foo.db "select sql from sqlite_master where sql not NULL;"
Not enabling exceptions.
fctrl = 037f
sql = CREATE TABLE foobar (id int primary key, name text)



Here is the output of a debug session using gdb:


$ env
LD_LIBRARY_PATH=/home/tdescham/repo/isam/buildroot-qemu/output/staging/usr/lib
gdb ./sqlite-test
GNU gdb (Gentoo 8.1 p1) 8.1
Copyright (C) 2018 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.  Type "show copying"
and "show warranty" for details.
This GDB was configured as "x86_64-pc-linux-gnu".
Type "show configuration" for configuration details.
For bug reporting instructions, please see:
<https://bugs.gentoo.org/>.
Find the GDB manual and other documentation resources online at:
<http://www.gnu.org/software/gdb/documentation/>.
For help, type "help".
Type "apropos word" to search for commands related to "word"...
Reading symbols from ./sqlite-test...done.
(gdb) display $fctrl
1: $fctrl = <error: No registers.>
(gdb) display $fstat
2: $fstat = <error: No registers.>
(gdb) display $ftag
3: $ftag = <error: No registers.>
(gdb) display $fop
4: $fop = <error: No registers.>
(gdb) display $st0
5: $st0 = <error: No registers.>
(gdb) display $st1
6: $st1 = <error: No registers.>
(gdb) display $st2
7: $st2 = <error: No registers.>
(gdb) break sqlite3VdbeMemStringify
Function "sqlite3VdbeMemStringify" not defined.
Make breakpoint pending on future shared library load? (y or [n]) y
Breakpoint 1 (sqlite3VdbeMemStringify) pending.

(gdb) run 1 /tmp/test.db "select sql from sqlite_master where sql not NULL;"
Starting program: /tmp/x86/sqlite-test 1 /tmp/test.db "select sql from
sqlite_master where sql not NULL;"
[Thread debugging using libthread_db enabled]
Using host libthread_db library "/lib64/libthread_db.so.1".
Enabling exception: FE_UNDERFLOW
fctrl = 036f

Breakpoint 1, sqlite3VdbeMemStringify (pMem=0x8064290, enc=0x1, bForce=0x0)
    at sqlite3.c:70725
70725   SQLITE_PRIVATE int sqlite3VdbeMemStringify(Mem *pMem, u8 enc, u8
bForce){
1: $fctrl = 0x36f
2: $fstat = 0x0
3: $ftag = 0xffff
4: $fop = 0x0
5: $st0 = 0
6: $st1 = 0
7: $st2 = 0

(gdb) break *(&sqlite3VdbeMemStringify + 68)
Breakpoint 2 at 0xf7f53bd4: file sqlite3.c, line 70748.

##
## NOTE: Showing disassembly of this function for context.
## Bug will occur at offset 68, but only after passing it the second time.
##

(gdb) disassemble /m
Dump of assembler code for function sqlite3VdbeMemStringify:
70725   SQLITE_PRIVATE int sqlite3VdbeMemStringify(Mem *pMem, u8 enc, u8
bForce){
=> 0xf7f53b90 <+0>:     push   %ebp
   0xf7f53b91 <+1>:     mov    %esp,%ebp
   0xf7f53b93 <+3>:     push   %edi
   0xf7f53b94 <+4>:     push   %esi
   0xf7f53b95 <+5>:     mov    %eax,%esi
   0xf7f53b97 <+7>:     push   %ebx
   0xf7f53b98 <+8>:     sub    $0x1c,%esp
   0xf7f53b9f <+15>:    mov    %dl,-0x25(%ebp)
   0xf7f53ba7 <+23>:    mov    %cl,-0x26(%ebp)
   0xf7f53baa <+26>:    call   0xf7f37b10 <__x86.get_pc_thunk.bx>
   0xf7f53baf <+31>:    add    $0x7a451,%ebx

70726     int fg = pMem->flags;
   0xf7f53b9b <+11>:    movzwl 0x8(%eax),%eax
   0xf7f53bb5 <+37>:    mov    %eax,-0x24(%ebp)

70727     const int nByte = 32;
70728   
70729     assert( pMem->db==0 || sqlite3_mutex_held(pMem->db->mutex) );
70730     assert( !(fg&MEM_Zero) );
70731     assert( !(fg&(MEM_Str|MEM_Blob)) );
70732     assert( fg&(MEM_Int|MEM_Real) );
70733     assert( (pMem->flags&MEM_RowSet)==0 );
70734     assert( EIGHT_BYTE_ALIGNMENT(pMem) );
70735   
70736   
70737     if( sqlite3VdbeMemClearAndResize(pMem, nByte) ){
   0xf7f53ba2 <+18>:    mov    $0x20,%edx
   0xf7f53bb8 <+40>:    mov    %esi,%eax
   0xf7f53bba <+42>:    call   0xf7f4f6d5 <sqlite3VdbeMemClearAndResize>
   0xf7f53bbf <+47>:    test   %eax,%eax
   0xf7f53bc1 <+49>:    je     0xf7f53bce <sqlite3VdbeMemStringify+62>

70738       pMem->enc = 0;
   0xf7f53bc3 <+51>:    movb   $0x0,0xa(%esi)

70739       return SQLITE_NOMEM_BKPT;
   0xf7f53bc7 <+55>:    mov    $0x7,%edi
   0xf7f53bcc <+60>:    jmp    0xf7f53c3a <sqlite3VdbeMemStringify+170>

70740     }
70741   
70742     /* For a Real or Integer, use sqlite3_snprintf() to produce the UTF-8
70743     ** string representation of the value. Then, if the required encoding
70744     ** is UTF-16le or UTF-16be do a translation.
70745     ** 
70746     ** FIX ME: It would be better if sqlite3_snprintf() could do UTF-16.
70747     */
70748     if( fg & MEM_Int ){
   0xf7f53bce <+62>:    testb  $0x4,-0x24(%ebp)
   0xf7f53bd2 <+66>:    mov    %eax,%edi
   0xf7f53bd4 <+68>:    fldl   (%esi)
   0xf7f53bd6 <+70>:    mov    0x10(%esi),%eax
   0xf7f53bd9 <+73>:    fstpl  -0x20(%ebp)
   0xf7f53bdc <+76>:    je     0xf7f53bef <sqlite3VdbeMemStringify+95>

70749       sqlite3_snprintf(nByte, pMem->z, "%lld", pMem->u.i);
   0xf7f53bde <+78>:    sub    $0xc,%esp
   0xf7f53be1 <+81>:    pushl  -0x1c(%ebp)
   0xf7f53be4 <+84>:    lea    -0x1d2b7(%ebx),%edx
   0xf7f53bea <+90>:    pushl  -0x20(%ebp)
   0xf7f53bed <+93>:    jmp    0xf7f53bfe <sqlite3VdbeMemStringify+110>

70750     }else{
70751       assert( fg & MEM_Real );
70752       sqlite3_snprintf(nByte, pMem->z, "%!.15g", pMem->u.r);
   0xf7f53bef <+95>:    sub    $0xc,%esp
   0xf7f53bf2 <+98>:    pushl  -0x1c(%ebp)
   0xf7f53bf5 <+101>:   lea    -0x2164a(%ebx),%edx
   0xf7f53bfb <+107>:   pushl  -0x20(%ebp)
   0xf7f53bfe <+110>:   push   %edx
   0xf7f53bff <+111>:   push   %eax
   0xf7f53c00 <+112>:   push   $0x20
   0xf7f53c02 <+114>:   call   0xf7f35af0 <sqlite3_snprintf@plt>
   0xf7f53c0a <+122>:   add    $0x20,%esp
   0xf7f53c0d <+125>:   movzbl -0x25(%ebp),%edx

70753     }
70754     pMem->n = sqlite3Strlen30(pMem->z);
   0xf7f53c07 <+119>:   mov    0x10(%esi),%eax
   0xf7f53c11 <+129>:   call   0xf7f3da71 <sqlite3Strlen30>
   0xf7f53c1e <+142>:   mov    %eax,0xc(%esi)

70755     pMem->enc = SQLITE_UTF8;
   0xf7f53c1a <+138>:   movb   $0x1,0xa(%esi)

70756     pMem->flags |= MEM_Str|MEM_Term;
   0xf7f53c21 <+145>:   movzwl 0x8(%esi),%eax

70757     if( bForce ) pMem->flags &= ~(MEM_Int|MEM_Real);
   0xf7f53c16 <+134>:   cmpb   $0x0,-0x26(%ebp)
   0xf7f53c25 <+149>:   je     0xf7f53c2a <sqlite3VdbeMemStringify+154>
   0xf7f53c27 <+151>:   and    $0xfffffff3,%eax
   0xf7f53c2a <+154>:   or     $0x202,%eax
   0xf7f53c2f <+159>:   mov    %ax,0x8(%esi)

70758     sqlite3VdbeChangeEncoding(pMem, enc);
   0xf7f53c33 <+163>:   mov    %esi,%eax
   0xf7f53c35 <+165>:   call   0xf7f50c73 <sqlite3VdbeChangeEncoding>

70759     return SQLITE_OK;
70760   }
   0xf7f53c3a <+170>:   lea    -0xc(%ebp),%esp
   0xf7f53c3d <+173>:   mov    %edi,%eax
   0xf7f53c3f <+175>:   pop    %ebx
   0xf7f53c40 <+176>:   pop    %esi
   0xf7f53c41 <+177>:   pop    %edi
   0xf7f53c42 <+178>:   pop    %ebp
   0xf7f53c43 <+179>:   ret    

End of assembler dump.

(gdb) continue
Continuing.

Breakpoint 2, 0xf7f53bd4 in sqlite3VdbeMemStringify (pMem=0x8064290, enc=0x1, 
    bForce=0x0) at sqlite3.c:70748
70748     if( fg & MEM_Int ){
1: $fctrl = 0x36f
2: $fstat = 0x0
3: $ftag = 0xffff
4: $fop = 0x0
5: $st0 = 0
6: $st1 = 0
7: $st2 = 0

(gdb) info reg
eax            0x0      0x0
ecx            0xf7fce000       0xf7fce000
edx            0x8065f28        0x8065f28
ebx            0xf7fce000       0xf7fce000
esp            0xffffba50       0xffffba50
ebp            0xffffba78       0xffffba78
esi            0x8064290        0x8064290
edi            0x0      0x0
eip            0xf7f53bd4       0xf7f53bd4 <sqlite3VdbeMemStringify+68>
eflags         0x202    [ IF ]
cs             0x23     0x23
ss             0x2b     0x2b
ds             0x2b     0x2b
es             0x2b     0x2b
fs             0x0      0x0
gs             0x63     0x63

(gdb) x $esi
0x8064290:      0x00000002

##
## Bug will occur at the next assembly instruction.
## but not yet this first iteration.
##

(gdb) stepi
0xf7f53bd6      70748     if( fg & MEM_Int ){
1: $fctrl = 0x36f
2: $fstat = 0x3802
3: $ftag = 0x3fff
4: $fop = 0x0
5: $st0 = 9.88131291682493088353e-324
6: $st1 = 0
7: $st2 = 0

##
## No SIGFPE happened this first time
##
## Note that if we step two instructions further, executing "fstpl 
-0x20(%ebp)"
## then the 'fstat' register changes value and actually gets the underflow bit:
##
(gdb) stepi
(gdb) stepi
1: $fctrl = 0x36f
2: $fstat = 0xb892
3: $ftag = 0x3fff
4: $fop = 0x55d
5: $st0 = 9.88131291682493088353e-324
6: $st1 = 0
7: $st2 = 0

##
## I think this phase is the trigger for the bug, on the next fldl instruction.
##

(gdb) continue
Continuing.

Breakpoint 1, sqlite3VdbeMemStringify (pMem=0x8064290, enc=0x1, bForce=0x0)
    at sqlite3.c:70725
70725   SQLITE_PRIVATE int sqlite3VdbeMemStringify(Mem *pMem, u8 enc, u8
bForce){
1: $fctrl = 0x36f
2: $fstat = 0xb892
3: $ftag = 0x3fff
4: $fop = 0x55d
5: $st0 = 9.88131291682493088353e-324
6: $st1 = 0
7: $st2 = 0

(gdb) continue
Continuing.

##
## NOTE: bug will occur on next instruction.
## Note that meanwhile, fstat has changed from 0x3802 to 0xb892 and
## thus the underflow is already set, even though no SIGFPE occurred until now.
##

Breakpoint 2, 0xf7f53bd4 in sqlite3VdbeMemStringify (pMem=0x8064290, enc=0x1, 
    bForce=0x0) at sqlite3.c:70748
70748     if( fg & MEM_Int ){
1: $fctrl = 0x36f
2: $fstat = 0xb892
3: $ftag = 0x3fff
4: $fop = 0x55d
5: $st0 = 9.88131291682493088353e-324
6: $st1 = 0
7: $st2 = 0

(gdb) info reg
eax            0x0      0x0
ecx            0x0      0x0
edx            0x4      0x4
ebx            0xf7fce000       0xf7fce000
esp            0xffffba50       0xffffba50
ebp            0xffffba78       0xffffba78
esi            0x8064290        0x8064290
edi            0x0      0x0
eip            0xf7f53bd4       0xf7f53bd4 <sqlite3VdbeMemStringify+68>
eflags         0x202    [ IF ]
cs             0x23     0x23
ss             0x2b     0x2b
ds             0x2b     0x2b
es             0x2b     0x2b
fs             0x0      0x0
gs             0x63     0x63
(gdb) x $esi
0x8064290:      0x00000003

(gdb) stepi

Program received signal SIGFPE, Arithmetic exception.
0xf7f53bd4 in sqlite3VdbeMemStringify (pMem=0x8064290, enc=0x1, bForce=0x0)
    at sqlite3.c:70748
70748     if( fg & MEM_Int ){
1: $fctrl = 0x36f
2: $fstat = 0xb892
3: $ftag = 0x3fff
4: $fop = 0x55d
5: $st0 = 9.88131291682493088353e-324
6: $st1 = 0
7: $st2 = 0





[1] https://www.sqlite.org/quickstart.html
>From gcc-bugs-return-625016-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Thu Dec 06 20:14:23 2018
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80953

--- Comment #29 from ro at CeBiTec dot Uni-Bielefeld.DE <ro at CeBiTec dot Uni-Bielefeld.DE> ---
> --- Comment #28 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
[...]
>> -fno-delayed-branch made no difference.
>
> What about -fasynchronous-unwind-tables?

Is already included in sol2.h (ASAN_CC1_SPEC).
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88372

Martin Sebor <msebor at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |patch

--- Comment #4 from Martin Sebor <msebor at gcc dot gnu.org> ---
Patch: https://gcc.gnu.org/ml/gcc-patches/2018-12/msg00401.html
>From gcc-bugs-return-625018-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Thu Dec 06 20:25:02 2018
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Subject: [Bug target/88271] Omit test instruction after add
Date: Thu, 06 Dec 2018 20:25:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88271

--- Comment #4 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Daniel Fruzynski from comment #3)
> What about adding new pass at the end? It would look for various possible
> optimizations, which were missed earlier because they are cross-basic block.

We do have post-reload compare elimination that works cross-BB. However, it
runs before BB-reordering pass (which duplicates the compare), so this is what
compare elimination pass sees:

    1: NOTE_INSN_DELETED
    6: NOTE_INSN_BASIC_BLOCK 2
    3: NOTE_INSN_FUNCTION_BEG
    4: dx:SI=0x1
      REG_EQUAL 0x1
    5: ax:SI=0
      REG_EQUAL 0
   11: L11:
   12: NOTE_INSN_BASIC_BLOCK 3
   13: flags:CCZ=cmp(dx:SI,0)         <--- here is the compare
   14: pc={(flags:CCZ==0)?L24:pc}
      REG_BR_PROB 536870916
   15: NOTE_INSN_BASIC_BLOCK 4
   17: dx:DI=sign_extend(ax:SI)
   18: dx:SI=[dx:DI*0x4+`data']
   19: {dx:SI=dx:SI<<0x1;clobber flags:CC;}  <--- here is the "add"
   20: {ax:SI=ax:SI+0x1;clobber flags:CC;}
   35: pc=L11
   36: barrier
   24: L24:
   25: NOTE_INSN_BASIC_BLOCK 5
   26: {ax:SI=ax:SI-0x1;clobber flags:CC;}
   28: dx:DI=sign_extend(ax:SI)
   29: dx:SI=[dx:DI*0x4+`data']
   37: pc=L11
   38: barrier
   39: NOTE_INSN_DELETED

The pass can't do anything in this case, several edges are going into BB3.

FYI, BB-reorder pass creates:

    6: NOTE_INSN_BASIC_BLOCK 2
   41: NOTE_INSN_PROLOGUE_END
    3: NOTE_INSN_FUNCTION_BEG
    4: dx:SI=0x1
      REG_EQUAL 0x1
   46: {ax:DI=0;clobber flags:CC;}

   11: L11:
   12: NOTE_INSN_BASIC_BLOCK 3
   13: flags:CCZ=cmp(dx:SI,0)
      REG_DEAD dx:SI
   14: pc={(flags:CCZ==0)?L24:pc}
      REG_DEAD flags:CCZ
      REG_BR_PROB 536870916

   15: NOTE_INSN_BASIC_BLOCK 4
   17: dx:DI=sign_extend(ax:SI)
   18: dx:SI=[dx:DI*0x4+`data']
   19: {dx:SI=dx:SI<<0x1;clobber flags:CC;}
      REG_UNUSED flags:CC
   20: {ax:SI=ax:SI+0x1;clobber flags:CC;}
      REG_UNUSED flags:CC

   50: NOTE_INSN_BASIC_BLOCK 5
   48: flags:CCZ=cmp(dx:SI,0)
      REG_DEAD dx:SI
   49: pc={(flags:CCZ==0)?L24:pc}
      REG_DEAD flags:CCZ
      REG_BR_PROB 536870916

and then scheduler reorders insn stream to:

   ...
   15: NOTE_INSN_BASIC_BLOCK 4
   17: dx:DI=sign_extend(ax:SI)
   20: {ax:SI=ax:SI+0x1;clobber flags:CC;}
      REG_UNUSED flags:CC
   18: dx:SI=[dx:DI*0x4+`data']
   19: {dx:SI=dx:SI<<0x1;clobber flags:CC;}
      REG_UNUSED flags:CC
   48: flags:CCZ=cmp(dx:SI,0)
      REG_DEAD dx:SI
   49: pc={(flags:CCZ!=0)?L51:pc}
      REG_DEAD flags:CCZ
      REG_BR_PROB 536870916
   ...

So, this is indeed an exceptional situation, it is pure coincidence that the
optimization possibility is created. We *can* rerun compare elimination pass
after the scheduler, but I suspect the above case will be the one and only it
will catch.

I'm curious if removing this extra instruction really improves the runtime
above the noise level. Can you profile the loop w/ and w/o compare insn using
perf?
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Subject: [Bug c++/88136] -Wdeprecated-copy is draconian and shouldn't be in -Wall
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88136

--- Comment #4 from Jason Merrill <jason at gcc dot gnu.org> ---
Author: jason
Date: Thu Dec  6 21:17:08 2018
New Revision: 266867

URL: https://gcc.gnu.org/viewcvs?rev=266867&root=gcc&view=rev
Log:
        PR c++/88136 - -Wdeprecated-copy false positives

Deprecating the copy operations because the class has a user-provided
destructor turns out to have too many false positives; this patch adjusts
-Wdeprecated-copy to only deprecate if the other copy operation is
user-provided.  To get the earlier behavior, people can explicitly request
it with -Wdeprecated-copy-dtor.

gcc/c-family/
        * c.opt (Wdeprecated-copy-dtor): New.
        (Wdeprecated-copy): Move to -Wextra.
gcc/cp/
        * class.c (classtype_has_depr_implicit_copy): Rename from
        classtype_has_user_copy_or_dtor.
        * method.c (lazily_declare_fn): Adjust.
        * decl2.c (cp_warn_deprecated_use): Refer to -Wdeprecated-copy-dtor
        if deprecation is due to a destructor.

Modified:
    trunk/gcc/c-family/ChangeLog
    trunk/gcc/c-family/c.opt
    trunk/gcc/cp/ChangeLog
    trunk/gcc/cp/class.c
    trunk/gcc/cp/cp-tree.h
    trunk/gcc/cp/decl2.c
    trunk/gcc/cp/method.c
    trunk/gcc/doc/invoke.texi
    trunk/gcc/testsuite/g++.dg/cpp0x/depr-copy1.C
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Subject: [Bug c++/87861] [9 regression] ICE in output_constructor_regular_field, at varasm.c:5165
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87861

Jeffrey A. Law <law at redhat dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
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                 CC|                            |law at redhat dot com
     Ever confirmed|0                           |1
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Subject: [Bug sanitizer/80953] Support libsanitizer on Solaris
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80953

--- Comment #30 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
> Is already included in sol2.h (ASAN_CC1_SPEC).

OK.  Then unwind info is needed in the epilogue?
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Subject: [Bug target/88316] numerous big-endian issues with compatibility implementations of vector intrinsics for powerpc
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88316

--- Comment #1 from pc at gcc dot gnu.org ---
Author: pc
Date: Thu Dec  6 22:03:25 2018
New Revision: 266868

URL: https://gcc.gnu.org/viewcvs?rev=266868&root=gcc&view=rev
Log:
[rs6000] x86-compat vector intrinsics fixes for BE, 32bit

Fix general endian and 32-bit mode issues found in the
compatibility implementations of the x86 vector intrinsics when running the
associated test suite tests.  (The tests had been inadvertently made to PASS
without actually running the test code.  A later patch fixes this issue.)

2018-12-03  Paul A. Clarke  <pc@us.ibm.com>

        PR target/88316
        * config/rs6000/mmintrin.h (_mm_unpackhi_pi8): Fix for big-endian.
        (_mm_unpacklo_pi8): Likewise.
        (_mm_mulhi_pi16): Likewise.
        (_mm_packs_pi16): Fix for big-endian. Use preferred API.
        (_mm_packs_pi32): Likewise.
        (_mm_packs_pu16): Likewise.
        * config/rs6000/xmmintrin.h (_mm_cvtss_si32): Fix for big-endian.
        (_mm_cvtss_si64): Likewise.
        (_mm_cvtpi32x2_ps): Likewise.
        (_mm_shuffle_ps): Likewise.
        (_mm_movemask_pi8): Likewise.
        (_mm_mulhi_pu16): Likewise.
        (_mm_sad_pu8): Likewise.
        (_mm_sad_pu8): Likewise.
        (_mm_cvtpu16_ps): Fix for big-endian. Use preferred API.
        (_mm_cvtpu8_ps): Likewise.
        (_mm_movemask_ps): Better #else case for big-endian (no functional
        change).
        (_mm_shuffle_pi16): Likewise.
        * config/rs6000/emmintrin.h (_mm_movemask_pd): Fix for big-endian.
        Better #else case for big-endian (no functional change).
        (_mm_movemask_epi8): Likewise.
        (_mm_shufflehi_epi16): Likewise.
        (_mm_shufflelo_epi16): Likewise.
        (_mm_shuffle_epi32): Likewise.
        (_mm_mul_epu32): Fix for big-endian.
        (_mm_bsrli_si128): Likewise.
        (_mm_cvtps_pd): Better #else case for big endian.
        (_mm_mulhi_epi16): Likewise.
        (_mm_mul_epu32): Likewise.
        (_mm_slli_si128): Likewise.
        (_mm_sll_epi16): Likewise.
        (_mm_sll_epi32): Likewise.
        (_mm_sra_epi16): Likewise.
        (_mm_sra_epi32): Likewise.
        (_mm_srl_epi16): Likewise.
        (_mm_srl_epi32): Likewise.
        (_mm_mulhi_epu16): Likewise.
        (_mm_sad_epu8): Likewise.
        * config/rs6000/pmmintrin.h (_mm_hadd_ps): Fix for big-endian.
        (_mm_sub_ps): Likewise.
        * config/rs6000/mmintrin.h (_mm_cmpeq_pi8): Fix for 32-bit mode.
        * gcc/config/rs6000/tmmintrin.h (_mm_alignr_epi8): Use ENDIAN
        macros consistently (no functional changes).
        (_mm_alignr_pi8): Likewise.

Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/rs6000/emmintrin.h
    trunk/gcc/config/rs6000/mmintrin.h
    trunk/gcc/config/rs6000/pmmintrin.h
    trunk/gcc/config/rs6000/tmmintrin.h
    trunk/gcc/config/rs6000/xmmintrin.h
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88316

--- Comment #2 from pc at gcc dot gnu.org ---
Author: pc
Date: Thu Dec  6 22:11:01 2018
New Revision: 266869

URL: https://gcc.gnu.org/viewcvs?rev=266869&root=gcc&view=rev
Log:
[rs6000] Fix x86-compat vector intrinsics testcases for BE, 32bit

Fix general endian issues found in the test cases for thecompatibility
implementations of the x86 vector intrinsics.  (The tests had been
inadvertently made to PASS without actually running the test code.
A later patch fixes this issue.)

Additionally, a new <smmintrin.h> is added, as some of the APIs therein are
now used by the test cases.  It is _not_ a complete implementation of the
SSE4 interfaces, only the few "extract" interfaces uses by the tests.

2018-12-06  Paul A. Clarke  <pc@us.ibm.com>

[gcc]

        PR target/88316
        * config/rs6000/smmintrin.h: New file.
        * config.gcc: Add smmintrin.h to extra_headers for powerpc*-*-*.

[gcc/testsuite]

        PR target/88316
        * gcc.target/powerpc/mmx-packssdw-1.c: Fixes for big-endian.
        * gcc.target/powerpc/mmx-packsswb-1.c: Likewise.
        * gcc.target/powerpc/mmx-packuswb-1.c: Likewise.
        * gcc.target/powerpc/mmx-pmulhw-1.c: Likewise.
        * gcc.target/powerpc/sse-cvtpi32x2ps-1.c: Likewise.
        * gcc.target/powerpc/sse-cvtpu16ps-1.c: Likewise.
        * gcc.target/powerpc/sse-cvtss2si-1.c: Likewise.
        * gcc.target/powerpc/sse-cvtss2si-2.c: Likewise.
        * gcc.target/powerpc/sse2-pshufhw-1.c: Likewise.
        * gcc.target/powerpc/sse2-pshuflw-1.c: Likewise.



Added:
    trunk/gcc/config/rs6000/smmintrin.h
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config.gcc
    trunk/gcc/testsuite/ChangeLog
    trunk/gcc/testsuite/gcc.target/powerpc/mmx-packssdw-1.c
    trunk/gcc/testsuite/gcc.target/powerpc/mmx-packsswb-1.c
    trunk/gcc/testsuite/gcc.target/powerpc/mmx-packuswb-1.c
    trunk/gcc/testsuite/gcc.target/powerpc/mmx-pmulhw-1.c
    trunk/gcc/testsuite/gcc.target/powerpc/sse-cvtpi32x2ps-1.c
    trunk/gcc/testsuite/gcc.target/powerpc/sse-cvtpu16ps-1.c
    trunk/gcc/testsuite/gcc.target/powerpc/sse-cvtss2si-1.c
    trunk/gcc/testsuite/gcc.target/powerpc/sse-cvtss2si-2.c
    trunk/gcc/testsuite/gcc.target/powerpc/sse2-pshufhw-1.c
    trunk/gcc/testsuite/gcc.target/powerpc/sse2-pshuflw-1.c
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Subject: [Bug target/88316] numerous big-endian issues with compatibility implementations of vector intrinsics for powerpc
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88316

--- Comment #3 from pc at gcc dot gnu.org ---
Author: pc
Date: Thu Dec  6 22:14:55 2018
New Revision: 266870

URL: https://gcc.gnu.org/viewcvs?rev=266870&root=gcc&view=rev
Log:
[rs6000] Enable x86-compat vector intrinsics testing

The testsuite tests for the compatibility implementations of x86 vector
intrinsics for "powerpc" had been inadvertently made to PASS
without actually running the test code.

This patch removes the code which kept the tests from running the actual
test code.

2018-12-06  Paul A. Clarke  <pc@us.ibm.com>

[gcc/testsuite]

        PR target/88316
        * gcc.target/powerpc/bmi-check.h: Remove test for
        __BUILTIN_CPU_SUPPORTS__, thereby enabling test code to run.
        * gcc.target/powerpc/bmi2-check.h: Likewise.
        * gcc.target/powerpc/mmx-check.h: Likewise.
        * gcc.target/powerpc/sse-check.h: Likewise.
        * gcc.target/powerpc/sse2-check.h: Likewise.
        * gcc.target/powerpc/sse3-check.h: Likewise.

Modified:
    trunk/gcc/testsuite/ChangeLog
    trunk/gcc/testsuite/gcc.target/powerpc/bmi-check.h
    trunk/gcc/testsuite/gcc.target/powerpc/bmi2-check.h
    trunk/gcc/testsuite/gcc.target/powerpc/mmx-check.h
    trunk/gcc/testsuite/gcc.target/powerpc/sse-check.h
    trunk/gcc/testsuite/gcc.target/powerpc/sse2-check.h
    trunk/gcc/testsuite/gcc.target/powerpc/sse3-check.h
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Subject: [Bug c++/86397] [7/8/9 Regression] g++ ICE at on valid code in nothrow_spec_p, at cp/except.c:1158
Date: Thu, 06 Dec 2018 23:19:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86397

--- Comment #4 from Alexandre Oliva <aoliva at gcc dot gnu.org> ---
Author: aoliva
Date: Thu Dec  6 23:18:30 2018
New Revision: 266874

URL: https://gcc.gnu.org/viewcvs?rev=266874&root=gcc&view=rev
Log:
[PR86397] resolve nondependent noexcept specs early in C++1[14]

build_noexcept_spec refrained from resolving nondependent noexcept
expressions when they were not part of the function types (C++ 11 and
14).  This caused problems during mangling: canonical_eh_spec, when
called on the template function type, would find an unresolved but not
explicitly deferred expression, and nothrow_spec_p would reject it.

We could relax the mangling logic to skip canonical_eh_spec, but since
-Wnoexcept-type warns when mangling function names that change as
noexcept specs become part of types and of mangling in C++17, and the
test at mangling time may give incorrect results if the spec is not
resolved, we might as well keep things simple and resolve nondependent
noexcept specs sooner rather than later.  This is what this patch does.


for  gcc/cp/ChangeLog

        PR c++/86397
        * except.c (build_noexcept_spec): Resolve nondependent
        expressions.

for gcc/testsuite/ChangeLog

        PR c++/86397
        * g++.dg/cpp0x/pr86397-1.C: New.
        * g++.dg/cpp0x/pr86397-2.C: New.

Added:
    trunk/gcc/testsuite/g++.dg/cpp0x/pr86397-1.C
    trunk/gcc/testsuite/g++.dg/cpp0x/pr86397-2.C
Modified:
    trunk/gcc/cp/ChangeLog
    trunk/gcc/cp/except.c
    trunk/gcc/testsuite/ChangeLog
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Subject: [Bug c++/86747] [8/9 Regression] rejects-valid with redundant friend declaration
Date: Thu, 06 Dec 2018 23:19:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86747

--- Comment #6 from Alexandre Oliva <aoliva at gcc dot gnu.org> ---
Author: aoliva
Date: Thu Dec  6 23:18:40 2018
New Revision: 266875

URL: https://gcc.gnu.org/viewcvs?rev=266875&root=gcc&view=rev
Log:
[PR86747] tsubst friend tpl ctxt before looking it up for dupes

When a member template is redeclared as a friend, we enter the context
of the member before looking it up, and then we check that the decls
are compatible.  However, when the member template references template
types of the enclosing context, say an enclosing template class, the
compare fails because the friend decl is already tsubsted, whereas the
looked up name isn't.

The problem is that the enclosing context is taken from the friend
declaration before tsubsting it, so we look up in the context of the
generic template instead of that of the tsubsted one we're
specializing.  The solution is to tsubst the enclosing context when
it's a non-namespace scope.

for  gcc/cp/ChangeLog

        PR c++/86747
        * pt.c (tsubst_friend_class): Enter tsubsted class context.

for  gcc/testsuite/ChangeLog

        PR c++/86747
        * g++.dg/pr86747.C: New.

Added:
    trunk/gcc/testsuite/g++.dg/pr86747.C
Modified:
    trunk/gcc/cp/ChangeLog
    trunk/gcc/cp/pt.c
    trunk/gcc/testsuite/ChangeLog
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Subject: [Bug lto/88396] New: -flto -Wl,--whole-archive causes "multiple definition" errors in elfutils (only for bfd, not gold)
Date: Thu, 06 Dec 2018 23:25:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88396

            Bug ID: 88396
           Summary: -flto -Wl,--whole-archive causes "multiple definition"
                    errors in elfutils (only for bfd, not gold)
           Product: gcc
           Version: 8.2.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: lto
          Assignee: unassigned at gcc dot gnu.org
          Reporter: slyfox at inbox dot ru
                CC: marxin at gcc dot gnu.org
  Target Milestone: ---

Original example is a build failure of elfutils-0.175 against CFLAGS=-flto at:
    https://bugs.gentoo.org/616038

Extracted minimal reproducer looks like that:

  $ cat libdw.map 
    ELFUTILS_0.143 {
      global:
        dwarf_bytesize;
    };

  $ cat dwarf_bytesize.os.c 
    void dwarf_bytesize (void) {}
    asm (".symver dwarf_bytesize,dwarf_bytesize@@@ELFUTILS_0.143");

Reproducer:

  $ gcc -flto -c dwarf_bytesize.os.c -o dwarf_bytesize.os -fPIC
  $ gcc-ar cr libdw_pic.a dwarf_bytesize.os
  $ gcc-ranlib libdw_pic.a
  $ gcc -flto -o libdw.so -shared -Wl,--version-script,libdw.map,--no-undefined
-Wl,--whole-archive libdw_pic.a -Wl,--no-whole-archive -fuse-ld=bfd

 
/usr/lib/gcc/x86_64-pc-linux-gnu/8.2.0/../../../../x86_64-pc-linux-gnu/bin/ld.bfd:
/tmp/ccYR58eH.ltrans0.ltrans.o:(*IND*+0x0): multiple definition of
`dwarf_bytesize'; dwarf_bytesize.os (symbol from plugin):(.text+0x0): first
defined here

I'm not sure if it's an ld or gcc bug.
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Subject: [Bug c++/87506] [7/8/9 Regression] ICE with inherited constexpr constructor with const argument
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87506

--- Comment #3 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Author: jakub
Date: Thu Dec  6 23:25:10 2018
New Revision: 266877

URL: https://gcc.gnu.org/viewcvs?rev=266877&root=gcc&view=rev
Log:
        PR c++/87506
        * constexpr.c (adjust_temp_type): Handle EMPTY_CLASS_EXPR.

        * g++.dg/cpp0x/constexpr-87506.C: New test.

Added:
    trunk/gcc/testsuite/g++.dg/cpp0x/constexpr-87506.C
Modified:
    trunk/gcc/cp/ChangeLog
    trunk/gcc/cp/constexpr.c
    trunk/gcc/testsuite/ChangeLog
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Subject: [Bug tree-optimization/88367] [9 Regression] -fno-delete-null-pointer-checks doesn't work properly
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88367

--- Comment #10 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Author: jakub
Date: Thu Dec  6 23:28:04 2018
New Revision: 266878

URL: https://gcc.gnu.org/viewcvs?rev=266878&root=gcc&view=rev
Log:
        PR c/88367
        * tree-vrp.c (extract_range_from_binary_expr): For POINTER_PLUS_EXPR
        with -fno-delete-null-pointer-checks, set_nonnull only if the pointer
        is non-NULL and offset is known to have most significant bit clear.
        * vr-values.c (vr_values::vrp_stmt_computes_nonzero): For ADDR_EXPR
        of MEM_EXPR, return true if the MEM_EXPR has non-zero offset with
        most significant bit clear.  If offset does have most significant bit
        set and -fno-delete-null-pointer-checks, don't return true even if
        the base pointer is non-NULL.

        * gcc.dg/tree-ssa/pr88367.c: New test.

Added:
    trunk/gcc/testsuite/gcc.dg/tree-ssa/pr88367.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/testsuite/ChangeLog
    trunk/gcc/tree-vrp.c
    trunk/gcc/vr-values.c
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Subject: [Bug fortran/88377] ICE in gfc_omp_clause_copy_ctor, at fortran/trans-openmp.c:614
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88377

--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Author: jakub
Date: Thu Dec  6 23:29:04 2018
New Revision: 266879

URL: https://gcc.gnu.org/viewcvs?rev=266879&root=gcc&view=rev
Log:
        PR fortran/88377
        * trans-openmp.c (gfc_omp_clause_default_ctor,
        gfc_omp_clause_copy_ctor, gfc_omp_clause_assign_op,
        gfc_omp_clause_linear_ctor, gfc_omp_clause_dtor): Only consider
        GFC_DECL_GET_SCALAR_ALLOCATABLE vars as scalar allocatables if they
        have pointer type.

        * gfortran.dg/gomp/pr88377.f90: New test.

Added:
    trunk/gcc/testsuite/gfortran.dg/gomp/pr88377.f90
Modified:
    trunk/gcc/fortran/ChangeLog
    trunk/gcc/fortran/trans-openmp.c
    trunk/gcc/testsuite/ChangeLog
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Subject: [Bug rtl-optimization/85770] [9 Regression] ICE: in lra_eliminate, at lra-eliminations.c:1439 with -march=nano-1000
Date: Thu, 06 Dec 2018 23:40:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85770

--- Comment #7 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Author: jakub
Date: Thu Dec  6 23:39:12 2018
New Revision: 266880

URL: https://gcc.gnu.org/viewcvs?rev=266880&root=gcc&view=rev
Log:
        PR rtl-optimization/85770
        * gcc.target/i386/pr85770.c: Require int128 effective target.

Modified:
    trunk/gcc/testsuite/ChangeLog
    trunk/gcc/testsuite/gcc.target/i386/pr85770.c
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Subject: [Bug target/85593] [7/8/9 Regression] GCC on ARM allocates R3 for local variable when calling naked function with O2 optimizations enabled
Date: Thu, 06 Dec 2018 23:41:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85593

--- Comment #14 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Author: jakub
Date: Thu Dec  6 23:41:04 2018
New Revision: 266881

URL: https://gcc.gnu.org/viewcvs?rev=266881&root=gcc&view=rev
Log:
        PR target/85593
        * final.c (rest_of_handle_final): Don't call collect_fn_hard_reg_usage
        for functions with naked attribute.

        * gcc.target/i386/pr85593.c: New test.

Added:
    trunk/gcc/testsuite/gcc.target/i386/pr85593.c
Modified:
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    trunk/gcc/final.c
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Subject: [Bug target/88271] Omit test instruction after add
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--- Comment #5 from Daniel Fruzynski <bugzilla@poradnik-webmastera.com> ---
How to use perf? I did not have change to use it yet, I usually use time
command or callgrind.

I have run my app compiled with AVX2 instructions on Xeon E5-2683 v3, CentOS
7.6, on idle CPU. I run it 3 times for both versions (w/ and w/o test
instructions). Here are results:

With test: Average 246,3 ms, StdDev 0,198
W/o test: Average 244,013ms, StdDev 0,043

Version with test is 0,94% slower - this is result which I expected.
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--- Comment #6 from Daniel Fruzynski <bugzilla@poradnik-webmastera.com> ---
Average for version with test is 246.313ms, I deleted too many digits.
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Subject: [Bug lto/88396] -flto -Wl,--whole-archive causes "multiple definition" errors in elfutils (only for bfd, not gold)
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--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
>I'm not sure if it's an ld or gcc bug.

Since it works with gold, this is more likely an BFD ld issue.

What version of binutils are you trying with?
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--- Comment #7 from Daniel Fruzynski <bugzilla@poradnik-webmastera.com> ---
One more note: this particular function creates matrices with all possible
permutations of row order of original matrix, which satisfies some additional
criteria. So this optimization may be applicable to other algorithms which
generates permutations.
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Subject: [Bug c++/85569] [8 Regression] is_invocable(F, decltype(objs)...)  fails with "not supported by dump_expr#" unless via indirection
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Alexandre Oliva <aoliva at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |NEW

--- Comment #12 from Alexandre Oliva <aoliva at gcc dot gnu.org> ---
FTR, the installed patch does not fix the reported problem, but rather another
problem that had surfaced after the report, that affected the (preprocessed)
workaround testcase.  GCC remains unable to compile the original testcase.
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Date: Fri, 07 Dec 2018 01:05:00 -0000
Message-ID: <20181207030440.240F984D5F35AD71@oneidacsd.org>
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Hello  ,

My name is Mrs. Raj Daoud from Syria Republic, I am in an urgent
need of an individual abroad who is willing to help me invest in
your country; Any investment you think that is profitable in your
country will be considered. Please write me on , for more
details.

Regards
Mrs. Raj Daoud


^ permalink raw reply	[flat|nested] 3+ messages in thread

* [Bug inline-asm/85185] Wider-than-expected load for struct member used as operand of inline-asm with memory clobber at -Og
       [not found] <bug-85185-4@http.gcc.gnu.org/bugzilla/>
  2018-12-06 16:12 ` [Bug inline-asm/85185] Wider-than-expected load for struct member used as operand of inline-asm with memory clobber at -Og segher at gcc dot gnu.org
@ 2021-04-21 19:31 ` pinskia at gcc dot gnu.org
  2021-09-14 19:34 ` [Bug c/85185] " segher at gcc dot gnu.org
  2 siblings, 0 replies; 3+ messages in thread
From: pinskia at gcc dot gnu.org @ 2021-04-21 19:31 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85185

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |documentation

--- Comment #11 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
as mentioned in another bug, this is more of a documentation issue and the
internal details on how inline-asm works.

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [Bug c/85185] Wider-than-expected load for struct member used as operand of inline-asm with memory clobber at -Og
       [not found] <bug-85185-4@http.gcc.gnu.org/bugzilla/>
  2018-12-06 16:12 ` [Bug inline-asm/85185] Wider-than-expected load for struct member used as operand of inline-asm with memory clobber at -Og segher at gcc dot gnu.org
  2021-04-21 19:31 ` pinskia at gcc dot gnu.org
@ 2021-09-14 19:34 ` segher at gcc dot gnu.org
  2 siblings, 0 replies; 3+ messages in thread
From: segher at gcc dot gnu.org @ 2021-09-14 19:34 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85185

--- Comment #12 from Segher Boessenkool <segher at gcc dot gnu.org> ---
(In reply to Andrew Pinski from comment #11)
> as mentioned in another bug, this is more of a documentation issue and the
> internal details on how inline-asm works.

Yup.  I suggest we advice to always use a register-size variable for an
"r" operand: so not smaller, and not any random expression, but a simple
variable.

Are there situations where this is a limitation?

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2021-09-14 19:34 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
     [not found] <bug-85185-4@http.gcc.gnu.org/bugzilla/>
2018-12-06 16:12 ` [Bug inline-asm/85185] Wider-than-expected load for struct member used as operand of inline-asm with memory clobber at -Og segher at gcc dot gnu.org
2021-04-21 19:31 ` pinskia at gcc dot gnu.org
2021-09-14 19:34 ` [Bug c/85185] " segher at gcc dot gnu.org

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