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* [Bug target/88808] bitwise operators on AVX512 masks fail to use the new mask instructions
[not found] <bug-88808-4@http.gcc.gnu.org/bugzilla/>
@ 2020-08-21 4:50 ` cvs-commit at gcc dot gnu.org
2020-08-21 4:53 ` crazylht at gmail dot com
2023-10-12 3:18 ` pinskia at gcc dot gnu.org
2 siblings, 0 replies; 3+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2020-08-21 4:50 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88808
--- Comment #4 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by hongtao Liu <liuhongt@gcc.gnu.org>:
https://gcc.gnu.org/g:388cb292a94f98a276548cd6ce01285cf36d17df
commit r11-2796-g388cb292a94f98a276548cd6ce01285cf36d17df
Author: liuhongt <hongtao.liu@intel.com>
Date: Thu Aug 13 14:20:43 2020 +0800
Enable bitwise operation for type mask.
Enable operator or/xor/and/andn/not for mask register, kxnor is not
enabled since there's no corresponding instruction for general
registers.
gcc/
PR target/88808
* config/i386/i386.c (ix86_preferred_reload_class): Allow
QImode data go into mask registers.
* config/i386/i386.md: (*movhi_internal): Adjust constraints
for mask registers.
(*movqi_internal): Ditto.
(*anddi_1): Support mask register operations
(*and<mode>_1): Ditto.
(*andqi_1): Ditto.
(*andn<mode>_1): Ditto.
(*<code><mode>_1): Ditto.
(*<code>qi_1): Ditto.
(*one_cmpl<mode>2_1): Ditto.
(*one_cmplsi2_1_zext): Ditto.
(*one_cmplqi2_1): Ditto.
(define_peephole2): Move constant 0/-1 directly into mask
registers.
* config/i386/predicates.md (mask_reg_operand): New predicate.
* config/i386/sse.md (define_split): Add post-reload splitters
that would convert "generic" patterns to mask patterns.
(*knotsi_1_zext): New define_insn.
gcc/testsuite/
* gcc.target/i386/bitwise_mask_op-1.c: New test.
* gcc.target/i386/bitwise_mask_op-2.c: New test.
* gcc.target/i386/bitwise_mask_op-3.c: New test.
* gcc.target/i386/avx512bw-pr88465.c: New testcase.
* gcc.target/i386/avx512bw-kunpckwd-1.c: Adjust testcase.
* gcc.target/i386/avx512bw-kunpckwd-3.c: Ditto.
* gcc.target/i386/avx512dq-kmovb-5.c: Ditto.
* gcc.target/i386/avx512f-kmovw-5.c: Ditto.
* gcc.target/i386/pr55342.c: Ditto.
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug target/88808] bitwise operators on AVX512 masks fail to use the new mask instructions
[not found] <bug-88808-4@http.gcc.gnu.org/bugzilla/>
2020-08-21 4:50 ` [Bug target/88808] bitwise operators on AVX512 masks fail to use the new mask instructions cvs-commit at gcc dot gnu.org
@ 2020-08-21 4:53 ` crazylht at gmail dot com
2023-10-12 3:18 ` pinskia at gcc dot gnu.org
2 siblings, 0 replies; 3+ messages in thread
From: crazylht at gmail dot com @ 2020-08-21 4:53 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88808
--- Comment #5 from Hongtao.liu <crazylht at gmail dot com> ---
Fixed in GCC11.
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug target/88808] bitwise operators on AVX512 masks fail to use the new mask instructions
[not found] <bug-88808-4@http.gcc.gnu.org/bugzilla/>
2020-08-21 4:50 ` [Bug target/88808] bitwise operators on AVX512 masks fail to use the new mask instructions cvs-commit at gcc dot gnu.org
2020-08-21 4:53 ` crazylht at gmail dot com
@ 2023-10-12 3:18 ` pinskia at gcc dot gnu.org
2 siblings, 0 replies; 3+ messages in thread
From: pinskia at gcc dot gnu.org @ 2023-10-12 3:18 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88808
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target Milestone|--- |11.0
Resolution|--- |FIXED
Status|NEW |RESOLVED
--- Comment #6 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Fixed as mentioned.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2020-08-21 4:50 ` [Bug target/88808] bitwise operators on AVX512 masks fail to use the new mask instructions cvs-commit at gcc dot gnu.org
2020-08-21 4:53 ` crazylht at gmail dot com
2023-10-12 3:18 ` pinskia at gcc dot gnu.org
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