[Bug tree-optimization/93893] MIPS32r2: GCC is unable to figure out that it can use a single INS instruction instead of SLL+OR

[Bug tree-optimization/93893] MIPS32r2: GCC is unable to figure out that it can use a single INS instruction instead of SLL+OR

[paul.hua.gm at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93893

Paul Hua <paul.hua.gm at gmail dot com> changed:

           What    |Removed                     |Added
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                 CC|                            |paul.hua.gm at gmail dot com

--- Comment #2 from Paul Hua <paul.hua.gm at gmail dot com> ---
(In reply to Andrew Pinski from comment #1)
> Mine for GCC 11.
> I have a patch which fixes this but won't be included until GCC 11:
> transpose_c:
>         .frame  $sp,0,$31               # vars= 0, regs= 0/0, args= 0, gp= 0
>         .mask   0x00000000,0
>         .fmask  0x00000000,0
>         .set    noreorder
>         .set    nomacro
>         lw      $2,0($4)
>         lw      $3,0($5)
>         ins     $3,$2,16,16
>         jr      $31
>         sw      $3,0($6)

Hi Andrew, can you send the patch to gcc-patches mail list or add to
attachment.

[Bug tree-optimization/93893] MIPS32r2: GCC is unable to figure out that it can use a single INS instruction instead of SLL+OR

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93893

--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Paul Hua from comment #2)
> Hi Andrew, can you send the patch to gcc-patches mail list or add to
> attachment.

It is a huge patch set, and not ready yet.  It does a few things and the rest
of the optimizers still need improvements to get back where we were before. 
But in this case, it just adds a few patterns to match.pd to use
BIT_INSERT_EXPR and that is in the generic part of GCC really.

I originally had a MIPS specific patch years ago but that was rejected and I
cannot find it right now but you should be able to look for my patch on the
mailing list.

[Bug tree-optimization/93893] MIPS32r2: GCC is unable to figure out that it can use a single INS instruction instead of SLL+OR

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93893

--- Comment #4 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Andrew Pinski from comment #3)
> I originally had a MIPS specific patch years ago but that was rejected and I
> cannot find it right now but you should be able to look for my patch on the
> mailing list.

Oh I found it:
https://gcc.gnu.org/legacy-ml/gcc-patches/2012-08/msg00942.html