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From: "law at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/94092] Code size and performance degradations after -ftree-loop-distribute-patterns was enabled at -O[2s]+
Date: Fri, 30 Apr 2021 14:38:27 +0000	[thread overview]
Message-ID: <bug-94092-4-LumxEqgC3a@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-94092-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94092

Jeffrey A. Law <law at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |law at gcc dot gnu.org

--- Comment #14 from Jeffrey A. Law <law at gcc dot gnu.org> ---
WRT Jim's comment about alignments in c#6.

Right now a pointer's alignment is really only used to eliminate unnecessary
masking -- we don't propagate a pointer's known alignment to improve the known
alignment of memory operations involving that pointer.

This is something I'd cobbled together for a closely related issue which will
try to increase the known alignment of a MEM by using the alignment of a
pointer to that MEM.

We've gone a slightly different (and more effective) route for that internal
issue, but this may still be worth polishing a bit and submitting.

diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 972512e81..be9ff76b5 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -859,6 +859,28 @@ gen_rtx_MEM (machine_mode mode, rtx addr)
      we clear it here.  */
   MEM_ATTRS (rt) = 0;

+  /* If we can deduce a higher alignment for the memory access
+     based on the pointer, then it's advantageous to do so.   */
+  unsigned int align = 0;
+  if (REG_P (addr)
+      && REG_POINTER (addr))
+    align = REGNO_POINTER_ALIGN (REGNO (addr));
+  else if (GET_CODE (addr) == PLUS
+          && REG_P (XEXP (addr, 0))
+          && REG_POINTER (XEXP (addr, 0))
+          && REGNO_POINTER_ALIGN (REGNO (XEXP (addr, 0)))
+          && GET_CODE (XEXP (addr, 1)) == CONST_INT)
+    {
+      unsigned int tmp = 1 << (ffs_hwi (INTVAL (XEXP (addr, 1))) - 1);
+      /* ALIGN is in bits.  */
+      tmp <<= 3;
+      align = REGNO_POINTER_ALIGN (REGNO (XEXP (addr, 0)));
+      align = (align > tmp) ? tmp : align;
+    }
+
+  if (align > mode_mem_attrs[(int) mode]->align)
+    set_mem_align (rt, align);
+
   return rt;
 }

  parent reply	other threads:[~2021-04-30 14:38 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-09  6:06 [Bug tree-optimization/94092] New: " bina2374 at gmail dot com
2020-03-09  6:17 ` [Bug tree-optimization/94092] " pinskia at gcc dot gnu.org
2020-03-09  6:29 ` pinskia at gcc dot gnu.org
2020-03-09  6:30 ` pinskia at gcc dot gnu.org
2020-03-09  7:37 ` glisse at gcc dot gnu.org
2020-03-09  9:48 ` rguenth at gcc dot gnu.org
2021-02-19  8:05 ` aoliva at gcc dot gnu.org
2021-02-23 23:57 ` wilson at gcc dot gnu.org
2021-02-24  7:43 ` rguenth at gcc dot gnu.org
2021-02-24  9:05 ` bina2374 at gmail dot com
2021-02-24  9:20 ` rguenth at gcc dot gnu.org
2021-02-26  6:35 ` bina2374 at gmail dot com
2021-03-03  6:30 ` bina2374 at gmail dot com
2021-03-03  8:03 ` rguenther at suse dot de
2021-04-29  4:24 ` aoliva at gcc dot gnu.org
2021-04-30 14:38 ` law at gcc dot gnu.org [this message]
2021-05-03  6:28 ` rguenther at suse dot de
2021-05-04 12:26 ` rguenth at gcc dot gnu.org

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