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From: "xiezhiheng at huawei dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/94442] [10/11 regression] Redundant loads/stores emitted at -O3
Date: Mon, 29 Jun 2020 02:04:19 +0000	[thread overview]
Message-ID: <bug-94442-4-B3YoKhDcjy@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-94442-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94442

--- Comment #6 from xiezhiheng at huawei dot com ---
I'm trying to modify get_inner_reference to handle the case
for MEM[ptr, off].

I extract the "off" and add it to the recorded offset, then I
build a MEM[ptr, 0] and return it later.

Like this
                }
              exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
            }
+         else if (TREE_CODE (TREE_OPERAND (exp, 0)) == SSA_NAME)
+           {
+             tree off = TREE_OPERAND (exp, 1);
+             if (!integer_zerop (off))
+               {
+                 poly_offset_int boff = mem_ref_offset (exp);
+                 boff <<= LOG2_BITS_PER_UNIT;
+                 bit_offset += boff;
+
+                 exp = build2 (MEM_REF, TREE_TYPE (exp),
+                               TREE_OPERAND (exp, 0),
+                               build_int_cst (TREE_TYPE (off), 0));
+               }
+           }
          goto done;

        default:

Assembly with the patch looks like:
.L6:
        ldp     q3, q2, [x0, 64]
        add     w2, w2, 1
        sqadd   v1.16b, v1.16b, v3.16b
        sqadd   v0.16b, v0.16b, v2.16b
        sqadd   v1.16b, v1.16b, v3.16b
        sqadd   v0.16b, v0.16b, v2.16b
        sqadd   v3.16b, v3.16b, v1.16b
        sqadd   v2.16b, v2.16b, v0.16b
        sqadd   v1.16b, v1.16b, v3.16b
        sqadd   v0.16b, v0.16b, v2.16b
        sqadd   v1.16b, v1.16b, v3.16b
        sqadd   v0.16b, v0.16b, v2.16b
        sqadd   v3.16b, v3.16b, v1.16b
        sqadd   v2.16b, v2.16b, v0.16b
        sqadd   v1.16b, v1.16b, v3.16b
        sqadd   v0.16b, v0.16b, v2.16b
        sqadd   v5.16b, v1.16b, v3.16b
        sqadd   v4.16b, v0.16b, v2.16b
        stp     q1, q0, [x0]
        sqadd   v3.16b, v3.16b, v5.16b
        sqadd   v2.16b, v2.16b, v4.16b
        sqadd   v1.16b, v1.16b, v3.16b
        sqadd   v0.16b, v0.16b, v2.16b
        stp     q3, q2, [x0, 64]
        stp     q1, q0, [x0, 32]
        cmp     w1, w2
        bne     .L6

  parent reply	other threads:[~2020-06-29  2:04 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-01 12:57 [Bug rtl-optimization/94442] New: [AArch64] Redundant ldp/stp instructions " xiezhiheng at huawei dot com
2020-04-01 21:12 ` [Bug tree-optimization/94442] " pinskia at gcc dot gnu.org
2020-04-06 12:14 ` wdijkstr at arm dot com
2020-04-30  7:22 ` [Bug tree-optimization/94442] [10 regression] Redundant loads/stores " rguenth at gcc dot gnu.org
2020-05-06  8:00 ` [Bug tree-optimization/94442] [10/11 " xiezhiheng at huawei dot com
2020-05-07 11:56 ` jakub at gcc dot gnu.org
2020-06-29  2:04 ` xiezhiheng at huawei dot com [this message]
2020-07-23  6:52 ` rguenth at gcc dot gnu.org
2021-01-14  8:36 ` [Bug middle-end/94442] " rguenth at gcc dot gnu.org
2021-01-14  8:36 ` rguenth at gcc dot gnu.org
2021-02-25 14:36 ` jakub at gcc dot gnu.org
2021-02-27  8:46 ` xiezhiheng at huawei dot com
2021-04-08 12:02 ` rguenth at gcc dot gnu.org
2022-06-28 10:40 ` [Bug middle-end/94442] [10/11/12/13 " jakub at gcc dot gnu.org
2023-07-07 10:37 ` [Bug middle-end/94442] [11/12/13/14 " rguenth at gcc dot gnu.org
2023-08-04 17:21 ` pinskia at gcc dot gnu.org

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