[Bug target/94680] New: Missed optimization with __builtin_shuffle and zero vector

[Bug target/94680] New: Missed optimization with __builtin_shuffle and zero vector

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94680

            Bug ID: 94680
           Summary: Missed optimization with __builtin_shuffle and zero
                    vector
           Product: gcc
           Version: 10.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: jakub at gcc dot gnu.org
  Target Milestone: ---

typedef float V __attribute__((vector_size(16)));
typedef int VI __attribute__((vector_size(16)));

V
foo (V x)
{
  return __builtin_shuffle (x, (V) { 0, 0, 0, 0 }, (VI) {0, 1, 4, 5});
}

can be done using movq or vmovq in a single insn, rather than zeroing a
register and doing movlhps.

[Bug target/94680] Missed optimization with __builtin_shuffle and zero vector

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94680

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |uros at gcc dot gnu.org
             Target|                            |x86_64-linux

--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
typedef float V __attribute__((vector_size(32)));
typedef int VI __attribute__((vector_size(32)));

V
foo (V x)
{
  return __builtin_shuffle (x, (V) { 0, 0, 0, 0, 0, 0, 0, 0 }, (VI) { 0, 1, 2,
3, 8, 9, 10, 11 });
}

with -mavx similarly could be done just using vmovps.
Or
typedef float V __attribute__((vector_size(64)));
typedef int VI __attribute__((vector_size(64)));

V
foo (V x)
{
  return __builtin_shuffle (x, (V) { 0 }, (VI) { 0, 1, 2, 3, 4, 5, 6, 7, 16,
17, 18, 19, 20, 21, 22, 23 });
}
using -mavx512f.

[Bug target/94680] Missed optimization with __builtin_shuffle and zero vector

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94680

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
             Status|UNCONFIRMED                 |NEW
           Severity|normal                      |enhancement
           Keywords|                            |missed-optimization
   Last reconfirmed|                            |2021-04-21

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Confirmed.

[Bug target/94680] Missed optimization with __builtin_shuffle and zero vector

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94680

--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Notice aarch64 should have a similar optimization and filed PR 100165 for that.

[Bug target/94680] Missed optimization with __builtin_shuffle and zero vector

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94680

--- Comment #4 from Hongtao.liu <crazylht at gmail dot com> ---
Let me do this.

[Bug target/94680] Missed optimization with __builtin_shuffle and zero vector

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94680

--- Comment #5 from Hongtao.liu <crazylht at gmail dot com> ---
A patch is posted at
https://gcc.gnu.org/pipermail/gcc-patches/2021-April/568571.html

[Bug target/94680] Missed optimization with __builtin_shuffle and zero vector

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94680

--- Comment #6 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by hongtao Liu <liuhongt@gcc.gnu.org>:

https://gcc.gnu.org/g:94de7e225c1fda079052c3f0725c926437d56c94

commit r12-760-g94de7e225c1fda079052c3f0725c926437d56c94
Author: liuhongt <hongtao.liu@intel.com>
Date:   Thu Apr 22 15:33:16 2021 +0800

    Optimize __builtin_shuffle when it's used to zero the upper bits of the
dest. [PR target/94680]

    If the second operand of __builtin_shuffle is const vector 0, and with
    specific mask, it can be optimized to movq/vmovps.

    .i.e.
    foo128:
    -       vxorps  %xmm1, %xmm1, %xmm1
    -       vmovlhps        %xmm1, %xmm0, %xmm0
    +       vmovq   %xmm0, %xmm0

     foo256:
    -       vxorps  %xmm1, %xmm1, %xmm1
    -       vshuff32x4      $0, %ymm1, %ymm0, %ymm0
    +       vmovaps %xmm0, %xmm0

     foo512:
    -       vxorps  %xmm1, %xmm1, %xmm1
    -       vshuff32x4      $68, %zmm1, %zmm0, %zmm0
    +       vmovaps %ymm0, %ymm0

    gcc/ChangeLog:

            PR target/94680
            * config/i386/sse.md (ssedoublevecmode): Add attribute for
            V64QI/V32HI/V16SI/V4DI.
            (ssehalfvecmode): Add attribute for V2DI/V2DF.
            (*vec_concatv4si_0): Extend to VI124_128.
            (*vec_concat<mode>_0): New pre-reload splitter.
            * config/i386/predicates.md (movq_parallel): New predicate.

    gcc/testsuite/ChangeLog:

            PR target/94680
            * gcc.target/i386/avx-pr94680.c: New test.
            * gcc.target/i386/avx512f-pr94680.c: New test.
            * gcc.target/i386/sse2-pr94680.c: New test.

[Bug target/94680] Missed optimization with __builtin_shuffle and zero vector

[roger at nextmovesoftware dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94680

Roger Sayle <roger at nextmovesoftware dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |12.0
         Resolution|---                         |FIXED
                 CC|                            |roger at nextmovesoftware dot com
             Status|NEW                         |RESOLVED

--- Comment #7 from Roger Sayle <roger at nextmovesoftware dot com> ---
This has been fixed since Hongtao's patch last year.  But the single
remaining case has now been fully optimized with:
https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=732e4a75fe792182f171bba348a665e8b8d21176
https://gcc.gnu.org/pipermail/gcc-patches/2022-March/591788.html