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* [Bug c/94735] New: MVE vector load/store pair getting removed with -O2.
@ 2020-04-23 17:22 sripar01 at gcc dot gnu.org
2020-04-23 17:24 ` [Bug c/94735] " sripar01 at gcc dot gnu.org
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: sripar01 at gcc dot gnu.org @ 2020-04-23 17:22 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94735
Bug ID: 94735
Summary: MVE vector load/store pair getting removed with -O2.
Product: gcc
Version: 10.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: sripar01 at gcc dot gnu.org
Target Milestone: ---
Created attachment 48362
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=48362&action=edit
test case
$ arm-none-eabi-gcc -v
Using built-in specs.
COLLECT_GCC=arm-none-eabi-gcc
COLLECT_LTO_WRAPPER=/media/sripar01/2tb_work/Release/build-arm-none-eabi/install/libexec/gcc/arm-none-eabi/10.0.1/lto-wrapper
Target: arm-none-eabi
Configured with: /media/sripar01/2tb_work/Release/src/gcc/configure
--target=arm-none-eabi
--prefix=/media/sripar01/2tb_work/Release/build-arm-none-eabi/install//
--with-gmp=/media/sripar01/2tb_work/Release/build-arm-none-eabi/host-tools
--with-mpfr=/media/sripar01/2tb_work/Release/build-arm-none-eabi/host-tools
--with-mpc=/media/sripar01/2tb_work/Release/build-arm-none-eabi/host-tools
--with-isl=/media/sripar01/2tb_work/Release/build-arm-none-eabi/host-tools
--disable-shared --disable-nls --disable-threads --disable-tls
--enable-checking=yes --enable-languages=c --without-cloog --without-isl
--with-newlib --without-headers --with-multilib-list=rmprofile
--with-pkgversion=unknown
Thread model: single
Supported LTO compression algorithms: zlib
gcc version 10.0.1 20200423 (experimental) (unknown)
$ arm-none-eabi-gcc mve_vstore.i -S -O2 -march=armv8.1-m.main+mve
-mfloat-abi=hard
On compiling attached test case (mve_vstore.i) with -02 optimizes out a pair of
vector load/store statements.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug c/94735] MVE vector load/store pair getting removed with -O2.
2020-04-23 17:22 [Bug c/94735] New: MVE vector load/store pair getting removed with -O2 sripar01 at gcc dot gnu.org
@ 2020-04-23 17:24 ` sripar01 at gcc dot gnu.org
2020-06-04 14:55 ` [Bug target/94735] " cvs-commit at gcc dot gnu.org
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: sripar01 at gcc dot gnu.org @ 2020-04-23 17:24 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94735
SRINATH PARVATHANENI <sripar01 at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Assignee|unassigned at gcc dot gnu.org |sripar01 at gcc dot gnu.org
Target| |arm-none-eabi
Ever confirmed|0 |1
Last reconfirmed| |2020-04-23
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug target/94735] MVE vector load/store pair getting removed with -O2.
2020-04-23 17:22 [Bug c/94735] New: MVE vector load/store pair getting removed with -O2 sripar01 at gcc dot gnu.org
2020-04-23 17:24 ` [Bug c/94735] " sripar01 at gcc dot gnu.org
@ 2020-06-04 14:55 ` cvs-commit at gcc dot gnu.org
2020-06-16 13:54 ` cvs-commit at gcc dot gnu.org
2020-06-18 11:08 ` sripar01 at gcc dot gnu.org
3 siblings, 0 replies; 5+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2020-06-04 14:55 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94735
--- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by SRINATH PARVATHANENI
<sripar01@gcc.gnu.org>:
https://gcc.gnu.org/g:9a810e57c4e6af54d29c325a013f451ade2b85e8
commit r11-934-g9a810e57c4e6af54d29c325a013f451ade2b85e8
Author: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Date: Thu Jun 4 15:41:29 2020 +0100
[ARM]: Correct the grouping of operands in MVE vector scatter store
intrinsics (PR94735).
The operands in RTL patterns of MVE vector scatter store intrinsics are
wrongly grouped,
because of which few vector loads and stores instructions are wrongly
getting optimized
out with -O2.
A new predicate "mve_scatter_memory" is defined in this patch, this
predicate returns TRUE on
matching: (mem(reg)) for MVE scatter store intrinsics.
This patch fixes the issue by adding define_expand pattern with
"mve_scatter_memory" predicate
and calls the corresponding define_insn by passing register_operand as
first argument.
This register_operand is extracted from the operand with
"mve_scatter_memory" predicate in
define_expand pattern.
gcc/ChangeLog:
2020-06-01 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
PR target/94735
* config/arm/predicates.md (mve_scatter_memory): Define to
match (mem (reg)) for scatter store memory.
* config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>):
Modify
define_insn to define_expand.
(mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
(mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
(mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
(mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
(mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
(mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
(mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
(mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
(mve_vstrhq_scatter_offset_fv8hf): Likewise.
(mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
(mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
(mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
(mve_vstrwq_scatter_offset_fv4sf): Likewise.
(mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
(mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
(mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
(mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
(mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
(mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
(mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
(mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for
scatter
stores.
(mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
(mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
(mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
(mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
(mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
(mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
(mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
(mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
(mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
(mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
(mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
(mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
(mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
(mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
(mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
(mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
(mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
(mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
(mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
(mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
gcc/testsuite/ChangeLog:
2020-06-01 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
PR target/94735
* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_base.c: New
test.
* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_base_p.c:
Likewise.
* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_offset.c:
Likewise.
* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_offset_p.c:
Likewise.
*
gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c:
Likewise.
*
gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c:
Likewise.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug target/94735] MVE vector load/store pair getting removed with -O2.
2020-04-23 17:22 [Bug c/94735] New: MVE vector load/store pair getting removed with -O2 sripar01 at gcc dot gnu.org
2020-04-23 17:24 ` [Bug c/94735] " sripar01 at gcc dot gnu.org
2020-06-04 14:55 ` [Bug target/94735] " cvs-commit at gcc dot gnu.org
@ 2020-06-16 13:54 ` cvs-commit at gcc dot gnu.org
2020-06-18 11:08 ` sripar01 at gcc dot gnu.org
3 siblings, 0 replies; 5+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2020-06-16 13:54 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94735
--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-10 branch has been updated by SRINATH PARVATHANENI
<sripar01@gcc.gnu.org>:
https://gcc.gnu.org/g:aac5ae144363dbd857654511fbf335e53c8f7cf5
commit r10-8312-gaac5ae144363dbd857654511fbf335e53c8f7cf5
Author: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Date: Tue Jun 16 12:53:23 2020 +0100
arm: Correct the grouping of operands in MVE vector scatter store
intrinsics (PR94735).
The operands in RTL patterns of MVE vector scatter store intrinsics are
wrongly grouped, because of which few vector loads and stores instructions
are wrongly getting optimized out with -O2.
A new predicate "mve_scatter_memory" is defined in this patch, this
predicate
returns TRUE on matching: (mem(reg)) for MVE scatter store intrinsics.
This patch fixes the issue by adding define_expand pattern with
"mve_scatter_memory" predicate and calls the corresponding define_insn by
passing register_operand as first argument. This register_operand is
extracted
from the operand with "mve_scatter_memory" predicate in define_expand
pattern.
Backported from mainline
2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
gcc/
PR target/94735
* config/arm/predicates.md (mve_scatter_memory): Define to
match (mem (reg)) for scatter store memory.
* config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>):
Modify
define_insn to define_expand.
(mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
(mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
(mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
(mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
(mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
(mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
(mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
(mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
(mve_vstrhq_scatter_offset_fv8hf): Likewise.
(mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
(mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
(mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
(mve_vstrwq_scatter_offset_fv4sf): Likewise.
(mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
(mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
(mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
(mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
(mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
(mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
(mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
(mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for
scatter
stores.
(mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
(mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
(mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
(mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
(mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
(mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
(mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
(mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
(mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
(mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
(mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
(mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
(mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
(mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
(mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
(mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
(mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
(mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
(mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
(mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
gcc/testsuite/
PR target/94735
* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_base.c: New
test.
* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_base_p.c:
Likewise.
* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_offset.c:
Likewise.
* gcc.target/arm/mve/intrinsics/mve_vstore_scatter_offset_p.c:
Likewise.
*
gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c:
Likewise.
*
gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c:
Likewise.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug target/94735] MVE vector load/store pair getting removed with -O2.
2020-04-23 17:22 [Bug c/94735] New: MVE vector load/store pair getting removed with -O2 sripar01 at gcc dot gnu.org
` (2 preceding siblings ...)
2020-06-16 13:54 ` cvs-commit at gcc dot gnu.org
@ 2020-06-18 11:08 ` sripar01 at gcc dot gnu.org
3 siblings, 0 replies; 5+ messages in thread
From: sripar01 at gcc dot gnu.org @ 2020-06-18 11:08 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94735
SRINATH PARVATHANENI <sripar01 at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Resolution|--- |FIXED
Status|NEW |RESOLVED
--- Comment #3 from SRINATH PARVATHANENI <sripar01 at gcc dot gnu.org> ---
Committed patch to trunk and gcc-10.
^ permalink raw reply [flat|nested] 5+ messages in thread
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2020-04-23 17:24 ` [Bug c/94735] " sripar01 at gcc dot gnu.org
2020-06-04 14:55 ` [Bug target/94735] " cvs-commit at gcc dot gnu.org
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