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* [Bug rtl-optimization/94838] New: Failure to optimize out useless zero-ing after register was already zero-ed
@ 2020-04-29  1:32 gabravier at gmail dot com
  2020-04-29  2:06 ` [Bug target/94838] " pinskia at gcc dot gnu.org
                   ` (5 more replies)
  0 siblings, 6 replies; 7+ messages in thread
From: gabravier at gmail dot com @ 2020-04-29  1:32 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94838

            Bug ID: 94838
           Summary: Failure to optimize out useless zero-ing after
                    register was already zero-ed
           Product: gcc
           Version: 10.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: gabravier at gmail dot com
  Target Milestone: ---

int f(bool b, int *p)
{
    return b && *p;
}

GCC generates this with -O3:

f(bool, int*):
  xor eax, eax
  test dil, dil
  je .L1
  mov edx, DWORD PTR [rsi]
  xor eax, eax ; This can be removed, since eax is already 0 here
  test edx, edx
  setne al
.L1:
  ret

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [Bug target/94838] Failure to optimize out useless zero-ing after register was already zero-ed
  2020-04-29  1:32 [Bug rtl-optimization/94838] New: Failure to optimize out useless zero-ing after register was already zero-ed gabravier at gmail dot com
@ 2020-04-29  2:06 ` pinskia at gcc dot gnu.org
  2020-04-29  6:50 ` gabravier at gmail dot com
                   ` (4 subsequent siblings)
  5 siblings, 0 replies; 7+ messages in thread
From: pinskia at gcc dot gnu.org @ 2020-04-29  2:06 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94838

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Severity|normal                      |enhancement

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Most likely it is due to splitting of the setting of eax from the cmp happens
after reload.  THIS IS a target issue because of that.

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [Bug target/94838] Failure to optimize out useless zero-ing after register was already zero-ed
  2020-04-29  1:32 [Bug rtl-optimization/94838] New: Failure to optimize out useless zero-ing after register was already zero-ed gabravier at gmail dot com
  2020-04-29  2:06 ` [Bug target/94838] " pinskia at gcc dot gnu.org
@ 2020-04-29  6:50 ` gabravier at gmail dot com
  2020-04-29  6:51 ` gabravier at gmail dot com
                   ` (3 subsequent siblings)
  5 siblings, 0 replies; 7+ messages in thread
From: gabravier at gmail dot com @ 2020-04-29  6:50 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94838

Gabriel Ravier <gabravier at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Target|x86_64-linux-gnu            |x86_64-* i?86-*-*

--- Comment #2 from Gabriel Ravier <gabravier at gmail dot com> ---
This also occurs on i68* : 

f(bool, int*):
  xor eax, eax ; Already 0
  cmp BYTE PTR [esp+4], 0
  je .L1
  mov eax, DWORD PTR [esp+8] ; Could use different caller-saved register such
as ecx or edx
  mov eax, DWORD PTR [eax]
  test eax, eax
  setne al
  movzx eax, al
.L1:
  ret

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [Bug target/94838] Failure to optimize out useless zero-ing after register was already zero-ed
  2020-04-29  1:32 [Bug rtl-optimization/94838] New: Failure to optimize out useless zero-ing after register was already zero-ed gabravier at gmail dot com
  2020-04-29  2:06 ` [Bug target/94838] " pinskia at gcc dot gnu.org
  2020-04-29  6:50 ` gabravier at gmail dot com
@ 2020-04-29  6:51 ` gabravier at gmail dot com
  2020-04-29  6:53 ` gabravier at gmail dot com
                   ` (2 subsequent siblings)
  5 siblings, 0 replies; 7+ messages in thread
From: gabravier at gmail dot com @ 2020-04-29  6:51 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94838

--- Comment #3 from Gabriel Ravier <gabravier at gmail dot com> ---
This also occurs on i68* : 

f(bool, int*):
  xor eax, eax ; Already 0
  cmp BYTE PTR [esp+4], 0
  je .L1
  mov eax, DWORD PTR [esp+8] ; Could use different caller-saved register such
as ecx or edx
  mov eax, DWORD PTR [eax]
  test eax, eax
  setne al
  movzx eax, al ; This could then be avoided since eax would already be 0
.L1:
  ret

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [Bug target/94838] Failure to optimize out useless zero-ing after register was already zero-ed
  2020-04-29  1:32 [Bug rtl-optimization/94838] New: Failure to optimize out useless zero-ing after register was already zero-ed gabravier at gmail dot com
                   ` (2 preceding siblings ...)
  2020-04-29  6:51 ` gabravier at gmail dot com
@ 2020-04-29  6:53 ` gabravier at gmail dot com
  2020-04-29  7:13 ` rguenth at gcc dot gnu.org
  2020-04-29  9:00 ` [Bug rtl-optimization/94838] " ubizjak at gmail dot com
  5 siblings, 0 replies; 7+ messages in thread
From: gabravier at gmail dot com @ 2020-04-29  6:53 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94838

--- Comment #4 from Gabriel Ravier <gabravier at gmail dot com> ---
Oops, seems like there was a weird collision. Don't pay attention to the second
to last comment before this one, it's identical to the last comment before this
one except for a single comment being added in the last comment before this
one.

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [Bug target/94838] Failure to optimize out useless zero-ing after register was already zero-ed
  2020-04-29  1:32 [Bug rtl-optimization/94838] New: Failure to optimize out useless zero-ing after register was already zero-ed gabravier at gmail dot com
                   ` (3 preceding siblings ...)
  2020-04-29  6:53 ` gabravier at gmail dot com
@ 2020-04-29  7:13 ` rguenth at gcc dot gnu.org
  2020-04-29  9:00 ` [Bug rtl-optimization/94838] " ubizjak at gmail dot com
  5 siblings, 0 replies; 7+ messages in thread
From: rguenth at gcc dot gnu.org @ 2020-04-29  7:13 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94838

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2020-04-29
             Status|UNCONFIRMED                 |NEW

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [Bug rtl-optimization/94838] Failure to optimize out useless zero-ing after register was already zero-ed
  2020-04-29  1:32 [Bug rtl-optimization/94838] New: Failure to optimize out useless zero-ing after register was already zero-ed gabravier at gmail dot com
                   ` (4 preceding siblings ...)
  2020-04-29  7:13 ` rguenth at gcc dot gnu.org
@ 2020-04-29  9:00 ` ubizjak at gmail dot com
  5 siblings, 0 replies; 7+ messages in thread
From: ubizjak at gmail dot com @ 2020-04-29  9:00 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94838

Uroš Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
          Component|target                      |rtl-optimization

--- Comment #5 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Gabriel Ravier from comment #0)
> int f(bool b, int *p)
> {
>     return b && *p;
> }
> 
> GCC generates this with -O3:
> 
> f(bool, int*):
>   xor eax, eax
>   test dil, dil
>   je .L1
>   mov edx, DWORD PTR [rsi]
>   xor eax, eax ; This can be removed, since eax is already 0 here
>   test edx, edx
>   setne al
> .L1:
>   ret

The first xor is return value load and the second is from peephole2 pass that
converts:

   11: NOTE_INSN_BASIC_BLOCK 3
   12: flags:CCZ=cmp([si:DI],0)
      REG_DEAD si:DI
   13: NOTE_INSN_DELETED
   32: ax:QI=flags:CCZ!=0
      REG_DEAD flags:CCZ
   33: ax:SI=zero_extend(ax:QI)

to:

   11: NOTE_INSN_BASIC_BLOCK 3
   40: {ax:SI=0;clobber flags:CC;}
   43: dx:SI=[si:DI]
   44: flags:CCZ=cmp(dx:SI,0)
   42: strict_low_part(ax:QI)=flags:CCZ!=0

The follow-up cprop-hardreg pass does not notice that we already have zero
loaded to a register.

There is nothing that target-dependent part can do here. A follow-up RTL
hardreg propagation pass should fix this.

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2020-04-29  9:00 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-04-29  1:32 [Bug rtl-optimization/94838] New: Failure to optimize out useless zero-ing after register was already zero-ed gabravier at gmail dot com
2020-04-29  2:06 ` [Bug target/94838] " pinskia at gcc dot gnu.org
2020-04-29  6:50 ` gabravier at gmail dot com
2020-04-29  6:51 ` gabravier at gmail dot com
2020-04-29  6:53 ` gabravier at gmail dot com
2020-04-29  7:13 ` rguenth at gcc dot gnu.org
2020-04-29  9:00 ` [Bug rtl-optimization/94838] " ubizjak at gmail dot com

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