[Bug rtl-optimization/96264] New: [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[Bug rtl-optimization/96264] New: [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[zsojka at seznam dot cz]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

            Bug ID: 96264
           Summary: [10/11 Regression] wrong code with -Os
                    -fno-forward-propagate -fschedule-insns -fno-tree-ter
           Product: gcc
           Version: 11.0
            Status: UNCONFIRMED
          Keywords: wrong-code
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: zsojka at seznam dot cz
  Target Milestone: ---
              Host: x86_64-pc-linux-gnu
            Target: powerpc64le-unknown-linux-gnu

Created attachment 48905
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=48905&action=edit
reduced testcase

$ powerpc64le-unknown-linux-gnu-gcc -Os -fno-forward-propagate -fschedule-insns
-fno-tree-ter testcase.c -static
$ ./a.out 
qemu: uncaught target signal 6 (Aborted) - core dumped
Aborted
(using qemu userspace emulation)

I am unable to find why is the generated code wrong; it might be also a qemu
error.

$ powerpc64le-unknown-linux-gnu-gcc -v
Using built-in specs.
COLLECT_GCC=/repo/gcc-trunk/binary-latest-powerpc64le/bin/powerpc64le-unknown-linux-gnu-gcc
COLLECT_LTO_WRAPPER=/repo/gcc-trunk/binary-trunk-r11-2246-20200721142816-gc850a642e1d-checking-yes-rtl-df-extra-powerpc64le/bin/../libexec/gcc/powerpc64le-unknown-linux-gnu/11.0.0/lto-wrapper
Target: powerpc64le-unknown-linux-gnu
Configured with: /repo/gcc-trunk//configure --enable-languages=c,c++
--enable-valgrind-annotations --disable-nls --enable-checking=yes,rtl,df,extra
--with-cloog --with-ppl --with-isl
--with-sysroot=/usr/powerpc64le-unknown-linux-gnu --build=x86_64-pc-linux-gnu
--host=x86_64-pc-linux-gnu --target=powerpc64le-unknown-linux-gnu
--with-ld=/usr/bin/powerpc64le-unknown-linux-gnu-ld
--with-as=/usr/bin/powerpc64le-unknown-linux-gnu-as --disable-libstdcxx-pch
--prefix=/repo/gcc-trunk//binary-trunk-r11-2246-20200721142816-gc850a642e1d-checking-yes-rtl-df-extra-powerpc64le
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 11.0.0 20200721 (experimental) (GCC)

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |10.2

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|10.2                        |10.3

--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
GCC 10.2 is released, adjusting target milestone.

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[marxin at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

Martin Liška <marxin at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2020-07-23
     Ever confirmed|0                           |1
                 CC|                            |marxin at gcc dot gnu.org

--- Comment #2 from Martin Liška <marxin at gcc dot gnu.org> ---
Confirmed on ppc64le machine.

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P2

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[seurer at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

seurer at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |seurer at gcc dot gnu.org

--- Comment #3 from seurer at gcc dot gnu.org ---
Created attachment 50167
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=50167&action=edit
Assembler output from working revision

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[seurer at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

--- Comment #4 from seurer at gcc dot gnu.org ---
Created attachment 50168
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=50168&action=edit
Assembler output from broken revision

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[seurer at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

seurer at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
               Host|x86_64-pc-linux-gnu         |x86_64-pc-linux-gnu,
                   |                            |powerpc64le-linux-gnu
                 CC|                            |bergner at gcc dot gnu.org,
                   |                            |rguenth at gcc dot gnu.org,
                   |                            |wschmidt at gcc dot gnu.org
              Build|                            |powerpc64le-linux-gnu

--- Comment #5 from seurer at gcc dot gnu.org ---
I too am able to duplicate this on a native powerpc64 LE machine.  Changing
any of the compilation options (-Os -fno-forward-propagate -fschedule-insns
-fno-tree-ter) generates code that works.

The revision that causes it is:

g:a7eb97ad269b6509bd7b31ca373daea98e4d7e85, r10-135

commit a7eb97ad269b6509bd7b31ca373daea98e4d7e85 (HEAD)
Author: Richard Biener <rguenther@suse.de>
Date:   Fri May 3 10:39:56 2019 +0000

    re PR middle-end/88963 (gcc generates terrible code for vectors of 64+
length which are not natively supported)

    2019-05-03  Richard Biener  <rguenther@suse.de>

            PR tree-optimization/88963
            * tree-ssa-forwprop.c (pass_forwprop::execute): Rewrite
            vector loads feeding only BIT_FIELD_REFs to component
            loads.  Rewrite stores fed by CONSTRUCTORs to component
            stores.

            * gcc.dg/tree-ssa/ssa-fre-31.c: Disable forwprop.
            * gcc.target/i386/pr88963-1.c: New testcase.
            * gcc.target/i386/pr88963-2.c: Likewise.

    From-SVN: r270844

I compared the assembler output from r10-134 and r10-135 for the test case and
the differences are significant.  Assembler output of the two revisions
attached.

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

--- Comment #6 from Richard Biener <rguenth at gcc dot gnu.org> ---
(In reply to seurer from comment #5)
> I too am able to duplicate this on a native powerpc64 LE machine.  Changing
> any of the compilation options (-Os -fno-forward-propagate -fschedule-insns
> -fno-tree-ter) generates code that works.
> 
> The revision that causes it is:
> 
> g:a7eb97ad269b6509bd7b31ca373daea98e4d7e85, r10-135
> 
> commit a7eb97ad269b6509bd7b31ca373daea98e4d7e85 (HEAD)
> Author: Richard Biener <rguenther@suse.de>
> Date:   Fri May 3 10:39:56 2019 +0000
> 
>     re PR middle-end/88963 (gcc generates terrible code for vectors of 64+
> length which are not natively supported)
>     
>     2019-05-03  Richard Biener  <rguenther@suse.de>
>     
>             PR tree-optimization/88963
>             * tree-ssa-forwprop.c (pass_forwprop::execute): Rewrite
>             vector loads feeding only BIT_FIELD_REFs to component
>             loads.  Rewrite stores fed by CONSTRUCTORs to component
>             stores.
>     
>             * gcc.dg/tree-ssa/ssa-fre-31.c: Disable forwprop.
>             * gcc.target/i386/pr88963-1.c: New testcase.
>             * gcc.target/i386/pr88963-2.c: Likewise.
>     
>     From-SVN: r270844
> 
> I compared the assembler output from r10-134 and r10-135 for the test case
> and the differences are significant.  Assembler output of the two revisions
> attached.

Note -fno-forward-propagate is an RTL optimization so if enabling that fixes
the issue the issue cannot really be the above rev. but it's probably exposed
by it only.  Note this is only done for vector load/stores using BLKmode.

Somebody needs to look at the RTL details to see what's the difference with
RTL fwprop or scheduling for example (at least for scheduling there are
existing dbg-counters that might help pointing to the breaking (non-)transform)

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |jakub at gcc dot gnu.org

--- Comment #7 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
My bisection also points at r10-135-ga7eb97ad269b6509bd7b31ca373daea98e4d7e85

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[seurer at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

--- Comment #8 from seurer at gcc dot gnu.org ---
Enabling -fno-forward-propagate triggers the problem.

seurer@genoa:~/gcc/git/build/gcc-10-test$ whichgcc
Now at commit g:a7eb97ad269b6509bd7b31ca373daea98e4d7e85, r10-135 


seurer@genoa:~/gcc/git/build/gcc-10-test$ ~/gcc/git/install/gcc-10-test/bin/gcc
-Os -fno-forward-propagate -fschedule-insns -fno-tree-ter t1.c -static
seurer@genoa:~/gcc/git/build/gcc-10-test$ ./a.out
Aborted (core dumped)
seurer@genoa:~/gcc/git/build/gcc-10-test$


seurer@genoa:~/gcc/git/build/gcc-10-test$ ~/gcc/git/install/gcc-10-test/bin/gcc
-Os -fschedule-insns -fno-tree-ter t1.c -static
seurer@genoa:~/gcc/git/build/gcc-10-test$ ./a.out
seurer@genoa:~/gcc/git/build/gcc-10-test$

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

--- Comment #9 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
So, using the r10-135 compiler, seems things go wrong during RA.
In *.ira, we have:
(insn 35 34 217 2 (parallel [
            (set (reg:DI 544 [ _29 ])
                (minus:DI (reg:DI 542 [ _26 ])
                    (reg:DI 123 [ _14 ])))
            (set (reg:DI 76 ca)
                (leu:DI (reg:DI 123 [ _14 ])
                    (reg:DI 542 [ _26 ])))
        ]) "pr96264.c":12:12 107 {subfdi3_carry}
     (expr_list:REG_DEAD (reg:DI 542 [ _26 ])
        (nil)))
...
(insn 36 195 37 2 (parallel [
            (set (reg:DI 545 [ _29+8 ])
                (plus:DI (plus:DI (not:DI (reg:DI 251))
                        (reg:DI 76 ca))
                    (reg:DI 543 [ _26+8 ])))
            (clobber (reg:DI 76 ca))
        ]) "pr96264.c":12:12 111 {*subfdi3_carry_in_internal}
     (expr_list:REG_DEAD (reg:DI 543 [ _26+8 ])
        (expr_list:REG_DEAD (reg:DI 76 ca)
            (expr_list:REG_UNUSED (reg:DI 76 ca)
                (expr_list:REG_EQUIV (mem/c:DI (plus:DI (reg/f:DI 522)
                            (const_int 8 [0x8])) [1  S8 A64])
                    (nil))))))
with lots of insns in between in ... but nothing that would use or set or
clobber (reg:DI 76 ca) - including tons of division instructions etc.

But in *.reload I see:
(insn 35 34 3298 2 (parallel [
            (set (reg:DI 7 7 [orig:544 _29 ] [544])
                (minus:DI (reg:DI 7 7 [orig:542 _26 ] [542])
                    (reg:DI 5 5 [orig:123 _14 ] [123])))
            (set (reg:DI 76 ca)
                (leu:DI (reg:DI 5 5 [orig:123 _14 ] [123])
                    (reg:DI 7 7 [orig:542 _26 ] [542])))
        ]) "pr96264.c":12:12 107 {subfdi3_carry}
     (nil))
...
(insn 193 192 195 2 (set (reg:DI 3 3 [orig:186 _88 ] [186])
        (zero_extend:DI (reg:HI 3 3 [366]))) "pr96264.c":13:10 14
{zero_extendhidi2}
     (nil))
(insn 195 193 3317 2 (set (reg:SI 10 10 [369])
        (udiv:SI (reg:SI 10 10 [276])
            (reg:SI 3 3 [orig:186 _88 ] [186]))) "pr96264.c":13:10 168
{udivsi3}
     (nil))
(insn 3317 195 3402 2 (set (reg:DI 3 3 [orig:543 _26+8 ] [543])
        (mem/c:DI (plus:DI (reg/f:DI 1 1)
                (const_int 568 [0x238])) [4 %sfp+568 S8 A64]))
"pr96264.c":12:12 608 {*movdi_internal64}
     (nil))
(insn 3402 3317 3387 2 (parallel [
            (set (reg:DI 11 11 [251])
                (ashiftrt:DI (reg:DI 5 5 [orig:123 _14 ] [123])
                    (const_int 63 [0x3f])))
            (clobber (reg:DI 76 ca))
        ]) "pr96264.c":12:12 275 {ashrdi3}
     (nil))
(note 3387 3402 36 2 NOTE_INSN_DELETED)
(insn 36 3387 3318 2 (parallel [
            (set (reg:DI 3 3 [orig:545 _29+8 ] [545])
                (plus:DI (plus:DI (not:DI (reg:DI 11 11 [251]))
                        (reg:DI 76 ca))
                    (reg:DI 3 3 [orig:543 _26+8 ] [543])))
            (clobber (reg:DI 76 ca))
        ]) "pr96264.c":12:12 111 {*subfdi3_carry_in_internal}
     (expr_list:REG_EQUIV (mem/c:DI (plus:DI (reg/f:DI 522)
                (const_int 8 [0x8])) [1  S8 A64])
        (nil)))

i.e. insn 3402 that clobbers (reg:DI 76 ca) has been added in between the
setter of that (insn 35) and user (insn 36).  That is why one gets
0x00000000000000010000000000000002 in the third int128 of the result rather
than 2.

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |ra
                 CC|                            |vmakarov at gcc dot gnu.org

--- Comment #10 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
And on the current trunk I see similar thing, looking for "ca)" in *.ira and
*.reload dumps shows:
(insn 30 750 32 2 (parallel [
            (set (reg:DI 247)
                (ashiftrt:DI (reg:DI 119 [ _15 ])
                    (const_int 63 [0x3f])))
            (clobber (reg:DI 98 ca))
        ]) "pr96264.c":12:20 281 {ashrdi3}
     (expr_list:REG_UNUSED (reg:DI 98 ca)
        (nil)))
(insn 32 30 87 2 (parallel [
            (set (reg:DI 540 [ _22 ])
                (minus:DI (reg:DI 538 [ _19 ])
                    (reg:DI 119 [ _15 ])))
            (set (reg:DI 98 ca)
                (leu:DI (reg:DI 119 [ _15 ])
                    (reg:DI 538 [ _19 ])))
        ]) "pr96264.c":12:12 104 {subfdi3_carry}
     (expr_list:REG_DEAD (reg:DI 538 [ _19 ])
        (nil)))
(insn 87 32 86 2 (parallel [
            (set (reg:HI 277)
                (vec_select:HI (reg:V8HI 129 [ _36 ])
                    (parallel [
                            (const_int 4 [0x4])
                        ])))
            (clobber (reg:V8HI 2668))
        ]) "pr96264.c":13:10 1365 {*vsx_extract_v8hi_p8}
     (expr_list:REG_UNUSED (reg:V8HI 2668)
        (nil)))
(insn 86 87 33 2 (set (reg:V8HI 135 [ _42 ])
        (plus:V8HI (reg:V8HI 259 [ _41 ])
            (reg:V8HI 273))) "pr96264.c":13:15 1614 {addv8hi3}
     (expr_list:REG_DEAD (reg:V8HI 259 [ _41 ])
        (nil)))
(insn 33 86 751 2 (parallel [
            (set (reg:DI 541 [ _22+8 ])
                (plus:DI (plus:DI (not:DI (reg:DI 247))
                        (reg:DI 98 ca))
                    (reg:DI 539 [ _19+8 ])))
            (clobber (reg:DI 98 ca))
        ]) "pr96264.c":12:12 108 {*subfdi3_carry_in_internal}
     (expr_list:REG_DEAD (reg:DI 539 [ _19+8 ])
        (expr_list:REG_DEAD (reg:DI 98 ca)
            (expr_list:REG_UNUSED (reg:DI 98 ca)
                (nil)))))
...
(insn 34 216 763 2 (parallel [
            (set (reg:DI 544 [ _26 ])
                (minus:DI (reg:DI 542 [ _23 ])
                    (reg:DI 119 [ _15 ])))
            (set (reg:DI 98 ca)
                (leu:DI (reg:DI 119 [ _15 ])
                    (reg:DI 542 [ _23 ])))
        ]) "pr96264.c":12:12 104 {subfdi3_carry}
     (expr_list:REG_DEAD (reg:DI 542 [ _23 ])
        (nil)))
(insn 763 34 221 2 (set (reg:DI 543 [ _23+8 ])
        (mem/j/c:DI (plus:DI (reg/f:DI 244)
                (const_int 8 [0x8])) [1 BIT_FIELD_REF <f, 128, 128>+8 S8 A64]))
"pr96264.c":12:12 636 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 244)
        (nil)))
(insn 221 763 768 2 (set (reg:DI 189 [ _96 ])
        (zero_extend:DI (subreg:HI (reg:SI 384) 0))) "pr96264.c":13:10 11
{zero_extendhidi2}
     (expr_list:REG_DEAD (reg:SI 384)
        (nil)))
(insn 768 221 35 2 (parallel [
            (set (mem/c:DI (plus:DI (reg/f:DI 110 sfp)
                        (const_int 352 [0x160])) [1  S8 A128])
                (reg:DI 544 [ _26 ]))
            (set (reg/f:DI 525)
                (plus:DI (reg/f:DI 110 sfp)
                    (const_int 352 [0x160])))
        ]) "pr96264.c":12:12 644 {movdi_di_update}
     (expr_list:REG_DEAD (reg:DI 544 [ _26 ])
        (nil)))
(insn 35 768 226 2 (parallel [
            (set (reg:DI 545 [ _26+8 ])
                (plus:DI (plus:DI (not:DI (reg:DI 247))
                        (reg:DI 98 ca))
                    (reg:DI 543 [ _23+8 ])))
            (clobber (reg:DI 98 ca))
        ]) "pr96264.c":12:12 108 {*subfdi3_carry_in_internal}
     (expr_list:REG_DEAD (reg:DI 543 [ _23+8 ])
        (expr_list:REG_DEAD (reg:DI 98 ca)
            (expr_list:REG_UNUSED (reg:DI 98 ca)
                (expr_list:REG_EQUIV (mem/c:DI (plus:DI (reg/f:DI 525)
                            (const_int 8 [0x8])) [1  S8 A64])
                    (nil))))))
...
(insn 36 141 761 2 (parallel [
            (set (reg:DI 548 [ _30 ])
                (minus:DI (reg:DI 546 [ _27 ])
                    (reg:DI 119 [ _15 ])))
            (set (reg:DI 98 ca)
                (leu:DI (reg:DI 119 [ _15 ])
                    (reg:DI 546 [ _27 ])))
        ]) "pr96264.c":12:12 104 {subfdi3_carry}
     (expr_list:REG_DEAD (reg:DI 546 [ _27 ])
        (nil)))
(insn 761 36 146 2 (set (reg:DI 547 [ _27+8 ])
        (mem/j/c:DI (plus:DI (reg/f:DI 242)
                (const_int 8 [0x8])) [1 BIT_FIELD_REF <f, 128, 256>+8 S8 A64]))
"pr96264.c":12:12 636 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 242)
        (nil)))
(insn 146 761 770 2 (set (reg:DI 159 [ _66 ])
        (zero_extend:DI (subreg:HI (reg:SI 324) 0))) "pr96264.c":13:10 11
{zero_extendhidi2}
     (expr_list:REG_DEAD (reg:SI 324)
        (nil)))
(insn 770 146 37 2 (parallel [
            (set (mem/c:DI (plus:DI (reg/f:DI 110 sfp)
                        (const_int 368 [0x170])) [1  S8 A128])
                (reg:DI 548 [ _30 ]))
            (set (reg/f:DI 526)
                (plus:DI (reg/f:DI 110 sfp)
                    (const_int 368 [0x170])))
        ]) "pr96264.c":12:12 644 {movdi_di_update}
     (expr_list:REG_DEAD (reg:DI 548 [ _30 ])
        (nil)))
(insn 37 770 151 2 (parallel [
            (set (reg:DI 549 [ _30+8 ])
                (plus:DI (plus:DI (not:DI (reg:DI 247))
                        (reg:DI 98 ca))
                    (reg:DI 547 [ _27+8 ])))
            (clobber (reg:DI 98 ca))
        ]) "pr96264.c":12:12 108 {*subfdi3_carry_in_internal}
     (expr_list:REG_DEAD (reg:DI 547 [ _27+8 ])
        (expr_list:REG_DEAD (reg:DI 98 ca)
            (expr_list:REG_UNUSED (reg:DI 98 ca)
                (expr_list:REG_EQUIV (mem/c:DI (plus:DI (reg/f:DI 526)
                            (const_int 8 [0x8])) [1  S8 A64])
                    (nil))))))
...
(insn 38 201 759 2 (parallel [
            (set (reg:DI 552 [ _34 ])
                (minus:DI (reg:DI 550 [ _31 ])
                    (reg:DI 119 [ _15 ])))
            (set (reg:DI 98 ca)
                (leu:DI (reg:DI 119 [ _15 ])
                    (reg:DI 550 [ _31 ])))
        ]) "pr96264.c":12:12 104 {subfdi3_carry}
     (expr_list:REG_DEAD (reg:DI 550 [ _31 ])
        (expr_list:REG_DEAD (reg:DI 119 [ _15 ])
            (nil))))
(insn 759 38 206 2 (set (reg:DI 551 [ _31+8 ])
        (mem/j/c:DI (plus:DI (reg/f:DI 240)
                (const_int 8 [0x8])) [1 BIT_FIELD_REF <f, 128, 384>+8 S8 A64]))
"pr96264.c":12:12 636 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 240)
        (nil)))
(insn 206 759 96 2 (set (reg:DI 183 [ _90 ])
        (zero_extend:DI (subreg:HI (reg:SI 372) 0))) "pr96264.c":13:10 11
{zero_extendhidi2}
     (expr_list:REG_DEAD (reg:SI 372)
        (nil)))
(insn 96 206 101 2 (set (reg:DI 139 [ _46 ])
        (zero_extend:DI (subreg:HI (reg:SI 284) 0))) "pr96264.c":13:10 11
{zero_extendhidi2}
     (expr_list:REG_DEAD (reg:SI 284)
        (nil)))
(insn 101 96 772 2 (set (reg:DI 141 [ _48 ])
        (zero_extend:DI (subreg:HI (reg:SI 288) 0))) "pr96264.c":13:10 11
{zero_extendhidi2}
     (expr_list:REG_DEAD (reg:SI 288)
        (nil)))
(insn 772 101 39 2 (parallel [
            (set (mem/c:DI (plus:DI (reg/f:DI 110 sfp)
                        (const_int 384 [0x180])) [1  S8 A128])
                (reg:DI 552 [ _34 ]))
            (set (reg/f:DI 527)
                (plus:DI (reg/f:DI 110 sfp)
                    (const_int 384 [0x180])))
        ]) "pr96264.c":12:12 644 {movdi_di_update}
     (expr_list:REG_DEAD (reg:DI 552 [ _34 ])
        (nil)))
(insn 39 772 106 2 (parallel [
            (set (reg:DI 553 [ _34+8 ])
                (plus:DI (plus:DI (not:DI (reg:DI 247))
                        (reg:DI 98 ca))
                    (reg:DI 551 [ _31+8 ])))
            (clobber (reg:DI 98 ca))
        ]) "pr96264.c":12:12 108 {*subfdi3_carry_in_internal}
     (expr_list:REG_DEAD (reg:DI 551 [ _31+8 ])
        (expr_list:REG_DEAD (reg:DI 247)
            (expr_list:REG_DEAD (reg:DI 98 ca)
                (expr_list:REG_UNUSED (reg:DI 98 ca)
                    (expr_list:REG_EQUIV (mem/c:DI (plus:DI (reg/f:DI 527)
                                (const_int 8 [0x8])) [1  S8 A64])
                        (nil)))))))

and that is all, and it looks good, the >> 63 shift clobbers ca and then there
is always a pair of subfdi3_carry that sets it and subfdi3_carry_in_internal
that consumes it.
But in *.reload, one can see:
    Inserting rematerialization insn before:
 3404: {r2707:DI=r119:DI>>0x3f;clobber ca:DI;}
...
(insn 30 750 3289 2 (parallel [
            (set (reg:DI 9 9 [247])
                (ashiftrt:DI (reg:DI 8 8 [orig:119 _15 ] [119])
                    (const_int 63 [0x3f])))
            (clobber (reg:DI 98 ca))
        ]) "pr96264.c":12:20 281 {ashrdi3}
     (nil))
(insn 3289 30 32 2 (set (mem/c:DI (plus:DI (reg/f:DI 1 1)
                (const_int 544 [0x220])) [3 %sfp+544 S8 A64])
        (reg:DI 9 9 [247])) "pr96264.c":12:20 636 {*movdi_internal64}
     (nil))
(insn 32 3289 3290 2 (parallel [
            (set (reg:DI 9 9 [orig:540 _22 ] [540])
                (minus:DI (reg:DI 7 7 [orig:538 _19 ] [538])
                    (reg:DI 8 8 [orig:119 _15 ] [119])))
            (set (reg:DI 98 ca)
                (leu:DI (reg:DI 8 8 [orig:119 _15 ] [119])
                    (reg:DI 7 7 [orig:538 _19 ] [538])))
        ]) "pr96264.c":12:12 104 {subfdi3_carry}
     (nil))
(insn 3290 32 87 2 (set (mem/c:DI (plus:DI (reg/f:DI 1 1)
                (const_int 528 [0x210])) [3 %sfp+528 S8 A64])
        (reg:DI 9 9 [orig:540 _22 ] [540])) "pr96264.c":12:12 636
{*movdi_internal64}
     (nil))
(insn 87 3290 86 2 (parallel [
            (set (reg:HI 31 31 [277])
                (vec_select:HI (reg:V8HI 64 0 [orig:129 _36 ] [129])
                    (parallel [
                            (const_int 4 [0x4])
                        ])))
            (clobber (reg:V8HI 74 10 [2668]))
        ]) "pr96264.c":13:10 1365 {*vsx_extract_v8hi_p8}
     (nil))
(insn 86 87 3404 2 (set (reg:V8HI 76 12 [orig:135 _42 ] [135])
        (plus:V8HI (reg:V8HI 76 12 [orig:259 _41 ] [259])
            (reg:V8HI 75 11 [273]))) "pr96264.c":13:15 1614 {addv8hi3}
     (nil))
(insn 3404 86 3292 2 (parallel [
            (set (reg:DI 9 9 [247])
                (ashiftrt:DI (reg:DI 8 8 [orig:119 _15 ] [119])
                    (const_int 63 [0x3f])))
            (clobber (reg:DI 98 ca))
        ]) "pr96264.c":12:12 281 {ashrdi3}
     (nil))
(note 3292 3404 33 2 NOTE_INSN_DELETED)
(insn 33 3292 3291 2 (parallel [
            (set (reg:DI 9 9 [orig:541 _22+8 ] [541])
                (plus:DI (plus:DI (not:DI (reg:DI 9 9 [247]))
                        (reg:DI 98 ca))
                    (reg:DI 6 6 [orig:539 _19+8 ] [539])))
            (clobber (reg:DI 98 ca))
        ]) "pr96264.c":12:12 108 {*subfdi3_carry_in_internal}
     (nil))
...
In *.ira, there was just one >> 63 before all these TImode subtractions using
carry, but it seems LRA rematerialized the right shift instead of loading it
from memory even when it clobbers the ca register that is live at that point.

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[vmakarov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

--- Comment #11 from Vladimir Makarov <vmakarov at gcc dot gnu.org> ---
I've reproduced this bug and started to work on it.  The bug is serious and
should be probably considered as P1 one.  I try to fix it on this week.

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

--- Comment #12 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Vladimir Makarov <vmakarov@gcc.gnu.org>:

https://gcc.gnu.org/g:d1efec57e279f5b0cd62073696cd351fce369bb7

commit r11-7285-gd1efec57e279f5b0cd62073696cd351fce369bb7
Author: Vladimir N. Makarov <vmakarov@redhat.com>
Date:   Thu Feb 18 17:49:26 2021 -0500

    [PR96264] LRA: Check output insn hard regs when updating available
rematerialization after the insn

     Insn for rematerialization can contain a clobbered hard register.  We
    can not move such insn through another insn setting up the same hard
    register.  The patch adds such check.

    gcc/ChangeLog:

            PR rtl-optimization/96264
            * lra-remat.c (reg_overlap_for_remat_p): Check also output insn
            hard regs.

    gcc/testsuite/ChangeLog:

            PR rtl-optimization/96264
            * gcc.target/powerpc/pr96264.c: New.

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[seurer at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

--- Comment #13 from seurer at gcc dot gnu.org ---
Thanks, that did fix it on trunk.

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[bergner at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

Peter Bergner <bergner at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|---                         |FIXED

--- Comment #14 from Peter Bergner <bergner at gcc dot gnu.org> ---
(In reply to seurer from comment #13)
> Thanks, that did fix it on trunk.

Marking as fixed then.  Thanks Vlad!

[Bug rtl-optimization/96264] [10/11 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[seurer at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

seurer at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|RESOLVED                    |REOPENED
         Resolution|FIXED                       |---

--- Comment #15 from seurer at gcc dot gnu.org ---
It still fails on gcc 10, though

[Bug rtl-optimization/96264] [10 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[bergner at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

--- Comment #16 from Peter Bergner <bergner at gcc dot gnu.org> ---
(In reply to seurer from comment #15)
> It still fails on gcc 10, though

Vlad, can we get this backported to GCC 10?  Maybe in time for GCC 10.3?

[Bug rtl-optimization/96264] [10 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[vmakarov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

--- Comment #17 from Vladimir Makarov <vmakarov at gcc dot gnu.org> ---
(In reply to Peter Bergner from comment #16)
> (In reply to seurer from comment #15)
> > It still fails on gcc 10, though
> 
> Vlad, can we get this backported to GCC 10?  Maybe in time for GCC 10.3?

Nobody complained about this patch since its commit.  So I believe we can
backport it and the patch should be safe for GCC 10 branch.

[Bug rtl-optimization/96264] [10 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

--- Comment #18 from Richard Biener <rguenth at gcc dot gnu.org> ---
Please somebody do it quick then (not omitting necessary testing, of course).

[Bug rtl-optimization/96264] [10 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[vmakarov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

--- Comment #19 from Vladimir Makarov <vmakarov at gcc dot gnu.org> ---
(In reply to Richard Biener from comment #18)
> Please somebody do it quick then (not omitting necessary testing, of course).

I am working on it.  It is my highest priority work.  The patch is ready.  If
the testing is ok (arm64 machines are a bottleneck for me), I'll commit it
today.

[Bug rtl-optimization/96264] [10 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[tnfchris at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

Tamar Christina <tnfchris at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |tnfchris at gcc dot gnu.org

--- Comment #20 from Tamar Christina <tnfchris at gcc dot gnu.org> ---
(In reply to Vladimir Makarov from comment #19)
> (In reply to Richard Biener from comment #18)
> > Please somebody do it quick then (not omitting necessary testing, of course).
> 
> I am working on it.  It is my highest priority work.  The patch is ready. 
> If the testing is ok (arm64 machines are a bottleneck for me), I'll commit
> it today.

That should hopefully be resolved soon
https://github.com/WorksOnArm/cluster/issues/252

[Bug rtl-optimization/96264] [10 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

--- Comment #21 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-10 branch has been updated by Vladimir Makarov
<vmakarov@gcc.gnu.org>:

https://gcc.gnu.org/g:1b7c97f25b271f826958873bda4fafc4cfc5b60d

commit r10-9644-g1b7c97f25b271f826958873bda4fafc4cfc5b60d
Author: Vladimir N. Makarov <vmakarov@redhat.com>
Date:   Thu Feb 18 17:49:26 2021 -0500

    [PR96264] LRA: Check output insn hard regs when updating available
rematerialization after the insn

     Insn for rematerialization can contain a clobbered hard register.  We
    can not move such insn through another insn setting up the same hard
    register.  The patch adds such check.

    gcc/ChangeLog:

            PR rtl-optimization/96264
            * lra-remat.c (reg_overlap_for_remat_p): Check also output insn
            hard regs.

    gcc/testsuite/ChangeLog:

            PR rtl-optimization/96264
            * gcc.target/powerpc/pr96264.c: New.

[Bug rtl-optimization/96264] [10 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[vmakarov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

--- Comment #22 from Vladimir Makarov <vmakarov at gcc dot gnu.org> ---
I've committed the patch to gcc-10 branch.

I also committed patch modifying the test -- see PR99233.

[Bug rtl-optimization/96264] [10 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

[seurer at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264

seurer at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|REOPENED                    |RESOLVED

--- Comment #23 from seurer at gcc dot gnu.org ---
It works now on gcc 10