[Bug target/96770] New: -mpure-code produces suboptimal code for relocations with small offset for thumb-1

[Bug target/96770] New: -mpure-code produces suboptimal code for relocations with small offset for thumb-1

[clyon at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96770

            Bug ID: 96770
           Summary: -mpure-code produces suboptimal code for relocations
                    with small offset for thumb-1
           Product: gcc
           Version: 10.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: clyon at gcc dot gnu.org
  Target Milestone: ---

As discussed in PR94538, -mpure-code produces suboptimal code for relocations
with small offset for thumb-1.

int arr[10];
int *f4 (void) { return &arr[1]; }

Compiled with -O2 -mpure-code,
-mcpu=cortex-m0:
f4:
        movs    r3, #:upper8_15:#.LC0
        lsls    r3, #8
        adds    r3, #:upper0_7:#.LC0
        lsls    r3, #8
        adds    r3, #:lower8_15:#.LC0
        lsls    r3, #8
        adds    r3, #:lower0_7:#.LC0
        @ sp needed
        ldr     r0, [r3]
        adds    r0, r0, #4
        bx      lr

We should avoid the extra load from the literal pool (related to PR96767), and
the 'adds r0,r0,4'.

-mcpu=cortex-m23:
f4:
        movw    r0, #:lower16:.LANCHOR0
        @ sp needed
        movt    r0, #:upper16:.LANCHOR0
        adds    r0, r0, #4
        bx      lr

For reference, -mcpu=cortex-m3 produces:
f4:
        movw    r0, #:lower16:.LANCHOR0+4
        movt    r0, #:upper16:.LANCHOR0+4
        bx      lr

We should generate the same code for cortex-m23.

[Bug target/96770] -mpure-code produces suboptimal code for relocations with small offset for thumb-1

[clyon at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96770

Christophe Lyon <clyon at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |ASSIGNED
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2020-09-08

[Bug target/96770] -mpure-code produces suboptimal code for relocations with small offset for thumb-1

[clyon at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96770

--- Comment #1 from Christophe Lyon <clyon at gcc dot gnu.org> ---
Patch sent for review:
https://gcc.gnu.org/pipermail/gcc-patches/2020-September/554957.html

[Bug target/96770] -mpure-code produces suboptimal code for relocations with small offset for thumb-1

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96770

--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Christophe Lyon <clyon@gcc.gnu.org>:

https://gcc.gnu.org/g:c3c3e2c9e88e25a410a2fe089782b094e911bb39

commit r11-4599-gc3c3e2c9e88e25a410a2fe089782b094e911bb39
Author: Christophe Lyon <christophe.lyon@linaro.org>
Date:   Mon Nov 2 07:34:50 2020 +0000

    arm: Improve handling of relocations with small offsets with -mpure-code on
v6m (PR96770)

    With -mpure-code on v6m (thumb-1), we can use small offsets with
    upper/lower relocations to avoid the extra addition of the
    offset.

    This patch accepts expressions symbol+offset as legitimate constants
    when the literal pool is disabled, making sure that the offset is
    within the range supported by thumb-1 [0..255] as described in the
    AAELF32 documentation.

    It also makes sure that thumb1_movsi_insn emits an error in case we
    try to use it with an unsupported RTL construct.

    2020-09-28  Christophe Lyon  <christophe.lyon@linaro.org>

            gcc/
            PR target/96770
            * config/arm/arm.c (thumb_legitimate_constant_p): Accept
            (symbol_ref + addend) when literal pool is disabled.
            (arm_valid_symbolic_address_p): Add support for thumb-1 without
            MOVT/MOVW.
            * config/arm/thumb1.md (*thumb1_movsi_insn): Accept (symbol_ref +
            addend) in the pure-code alternative.

            gcc/testsuite/
            PR target/96770
            * gcc.target/arm/pure-code/pr96770.c: New test.

[Bug target/96770] -mpure-code produces suboptimal code for relocations with small offset for thumb-1

[clyon at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96770

Christophe Lyon <clyon at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|ASSIGNED                    |RESOLVED

--- Comment #3 from Christophe Lyon <clyon at gcc dot gnu.org> ---
Fixed on trunk

[Bug target/96770] -mpure-code produces suboptimal code for relocations with small offset for thumb-1

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96770

--- Comment #4 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Christophe Lyon <clyon@gcc.gnu.org>:

https://gcc.gnu.org/g:46720db72cadfb85501e102d94e06683300a2327

commit r11-7881-g46720db72cadfb85501e102d94e06683300a2327
Author: Christophe Lyon <christophe.lyon@linaro.org>
Date:   Sun Mar 28 18:59:06 2021 +0000

    testsuite/arm: Improve scan-assembler in pr96770.c

    I'm seeing random scan-assembler-times failures in pr96770.c when LTO is
used.

    I suspect this is because the \\+4 string matches the LTO sections,
sometimes.

    This small patch avoids the issue, by matching arr\\+4 instead of \\+4.

    2021-03-28  Christophe Lyon  <christophe.lyon@linaro.org>

            gcc/testsuite/
            PR target/96770
            * gcc.target/arm/pure-code/pr96770.c: Improve scan-assembler-times.

[Bug target/96770] -mpure-code produces suboptimal code for relocations with small offset for thumb-1

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96770

--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Christophe Lyon <clyon@gcc.gnu.org>:

https://gcc.gnu.org/g:0754a104bed7c8a937f0623ad15ca03387131210

commit r11-8227-g0754a104bed7c8a937f0623ad15ca03387131210
Author: Christophe Lyon <christophe.lyon@linaro.org>
Date:   Fri Apr 16 19:58:25 2021 +0000

    testsuite/arm: Fix scan-assembler-times in pr96770.c with movt/movw

    The previous change to this testcase missed the fact that the data may
    be accessed via an anchor, depending on the optimization level,
    leading to false failures.

    This patch restricts matching to upper16:lower16 followed by
    non-spaces, followed by +4 (in f4) or +320 (in f5).

    Using '.*' instead of '[^ \]' would match accross the whole assembly
    file, which is not what we want, hence the limitation with spaces.

    2021-04-16  Christophe Lyon  <christophe.lyon@linaro.org>

            gcc/testsuite/
            PR target/96770
            * gcc.target/arm/pure-code/pr96770.c: Fix scan-assembler-times
            with movt/movw.