[Bug target/97684] New: [11 Regression] ICE in reg_preferred_class, at reginfo.c:789

[Bug target/97684] New: [11 Regression] ICE in reg_preferred_class, at reginfo.c:789

[asolokha at gmx dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97684

            Bug ID: 97684
           Summary: [11 Regression] ICE in reg_preferred_class, at
                    reginfo.c:789
           Product: gcc
           Version: 11.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: asolokha at gmx dot com
  Target Milestone: ---
            Target: powerpc-*-linux-gnu

gcc-11.0.0-alpha20201101 snapshot (g:590febb5f6624f78b36402a7c9a9c318978f1efa)
ICEs when compiling the following testcase w/ -mcpu=power9 -O2
-flive-range-shrinkage -fselective-scheduling -fno-plt:

void
uc (void);

void
hb ()
{
  uc ();
  uc ();
  hb (0);
}

% powerpc-e300c3-linux-gnu-gcc-11.0.0 -mcpu=power9 -O2 -flive-range-shrinkage
-fselective-scheduling -fno-plt -c eij2zyqf.c
during RTL pass: ira
eij2zyqf.c: In function 'hb':
eij2zyqf.c:10:1: internal compiler error: in reg_preferred_class, at
reginfo.c:789
   10 | }
      | ^
0x677ffe reg_preferred_class(int)
       
/var/tmp/portage/cross-powerpc-e300c3-linux-gnu/gcc-11.0.0_alpha20201101/work/gcc-11-20201101/gcc/reginfo.c:789
0xbe27e4 update_equiv_regs
       
/var/tmp/portage/cross-powerpc-e300c3-linux-gnu/gcc-11.0.0_alpha20201101/work/gcc-11-20201101/gcc/ira.c:3516
0xbe92c2 ira
       
/var/tmp/portage/cross-powerpc-e300c3-linux-gnu/gcc-11.0.0_alpha20201101/work/gcc-11-20201101/gcc/ira.c:5498
0xbe92c2 execute
       
/var/tmp/portage/cross-powerpc-e300c3-linux-gnu/gcc-11.0.0_alpha20201101/work/gcc-11-20201101/gcc/ira.c:5861

[Bug target/97684] [11 Regression] ICE in reg_preferred_class, at reginfo.c:789

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97684

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |ice-on-valid-code, ra
   Target Milestone|---                         |11.0

[Bug target/97684] [11 Regression] ICE in reg_preferred_class, at reginfo.c:789

[asolokha at gmx dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97684

Arseny Solokha <asolokha at gmx dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Target|powerpc-*-linux-gnu         |powerpc-*-linux-gnu,
                   |                            |x86_64-unknown-linux-gnu

--- Comment #1 from Arseny Solokha <asolokha at gmx dot com> ---
void
c5 (double);

void
g4 (int *n4)
{
  double lp = 0.0;
  int fn;

  for (fn = 0; fn < 18; ++fn)
    {
      int as;

      as = __builtin_abs (n4[fn]);
      if (as > lp)
        lp = as;
    }

  c5 (lp);
}

% x86_64-unknown-linux-gnu-gcc-11.0.0 -O1 -flive-range-shrinkage
-fschedule-insns -fselective-scheduling -funroll-all-loops -fno-web -c
s0owgzp5.c
during RTL pass: ira
s0owgzp5.c: In function 'g4':
s0owgzp5.c:20:1: internal compiler error: in reg_preferred_class, at
reginfo.c:794
   20 | }
      | ^
0x6b0710 reg_preferred_class(int)
       
/var/tmp/portage/sys-devel/gcc-11.0.0_alpha20201220/work/gcc-11-20201220/gcc/reginfo.c:794
0xc0f2e8 update_equiv_regs
       
/var/tmp/portage/sys-devel/gcc-11.0.0_alpha20201220/work/gcc-11-20201220/gcc/ira.c:3521
0xc154c5 ira
       
/var/tmp/portage/sys-devel/gcc-11.0.0_alpha20201220/work/gcc-11-20201220/gcc/ira.c:5554
0xc154c5 execute
       
/var/tmp/portage/sys-devel/gcc-11.0.0_alpha20201220/work/gcc-11-20201220/gcc/ira.c:5945

(As of gcc-11.0.0-alpha20201220 snapshot,
g:18e86fae2a14f78e70aae06afce6bb9853068bb1.)

[Bug rtl-optimization/97684] [11 Regression] ICE in reg_preferred_class, at reginfo.c:789

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97684

Uroš Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
          Component|target                      |rtl-optimization
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2020-12-27
             Status|UNCONFIRMED                 |NEW

--- Comment #2 from Uroš Bizjak <ubizjak at gmail dot com> ---
Confirmed as rtl-optimization PR.

Backtrace:

#2  0x00000000006ac7a0 in reg_preferred_class (regno=regno@entry=170) at
../../git/gcc/gcc/reginfo.c:794
#3  0x0000000000bebf37 in update_equiv_regs () at ../../git/gcc/gcc/ira.c:3521
#4  0x0000000000bf23fb in ira (f=<optimized out>) at
../../git/gcc/gcc/ira.c:5554

where in reg_preferred_class, an assert is triggered:

789     reg_preferred_class (int regno)
790     {
791       if (reg_pref == 0)
792         return GENERAL_REGS;
793
794       gcc_assert (regno < reg_info_size);
795       return (enum reg_class) reg_pref[regno].prefclass;
796     }

(gdb) p regno
$4 = 170
(gdb) p reg_info_size
$5 = 167

where regno is outside reg_info_size.

[Bug rtl-optimization/97684] [11 Regression] ICE in reg_preferred_class, at reginfo.c:789

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97684

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P1

--- Comment #3 from Richard Biener <rguenth at gcc dot gnu.org> ---
Guessing GCC 10.x works, but I see no bisection.

[Bug rtl-optimization/97684] [11 Regression] ICE in reg_preferred_class, at reginfo.c:789 by r11-4577

[hjl.tools at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97684

H.J. Lu <hjl.tools at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
            Summary|[11 Regression] ICE in      |[11 Regression] ICE in
                   |reg_preferred_class, at     |reg_preferred_class, at
                   |reginfo.c:789               |reginfo.c:789 by r11-4577
                 CC|                            |vmakarov at redhat dot com

--- Comment #4 from H.J. Lu <hjl.tools at gmail dot com> ---
It is caused by

commit 44fbc9c6e02ca5b8f98f25b514ed7588e7ba733d
Author: Vladimir N. Makarov <vmakarov@redhat.com>
Date:   Fri Oct 30 15:05:22 2020 -0400

    Take insn scratch RA requirements into account in IRA.

[Bug rtl-optimization/97684] [11 Regression] ICE in reg_preferred_class, at reginfo.c:789 by r11-4577

[vmakarov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97684

Vladimir Makarov <vmakarov at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |vmakarov at gcc dot gnu.org

--- Comment #5 from Vladimir Makarov <vmakarov at gcc dot gnu.org> ---
I've reproduced x86-64 case and started to work on it.  I think the patch will
be ready soon.

[Bug rtl-optimization/97684] [11 Regression] ICE in reg_preferred_class, at reginfo.c:789 by r11-4577

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97684

--- Comment #6 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Vladimir Makarov <vmakarov@gcc.gnu.org>:

https://gcc.gnu.org/g:081c96621da658760b4a67c07530805f770fa22c

commit r11-6943-g081c96621da658760b4a67c07530805f770fa22c
Author: Vladimir N. Makarov <vmakarov@redhat.com>
Date:   Wed Jan 27 14:53:28 2021 -0500

    [PR97684] IRA: Recalculate pseudo classes if we added new pseduos since
last calculation before updating equiv regs

    update_equiv_regs can use reg classes of pseudos and they are set up in
    register pressure sensitive scheduling and loop invariant motion and in
    live range shrinking.  This info can become obsolete if we add new pseudos
    since the last set up.  Recalculate it again if the new pseudos were
    added.

    gcc/ChangeLog:

            PR rtl-optimization/97684
            * ira.c (ira): Call ira_set_pseudo_classes before
            update_equiv_regs when it is necessary.

    gcc/testsuite/ChangeLog:

            PR rtl-optimization/97684
            * gcc.target/i386/pr97684.c: New.

[Bug rtl-optimization/97684] [11 Regression] ICE in reg_preferred_class, at reginfo.c:789 by r11-4577

[seurer at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97684

seurer at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |seurer at gcc dot gnu.org

--- Comment #7 from seurer at gcc dot gnu.org ---
The two bits of code shown seem to compile fine now on powerpc.  Is this done
then?

[Bug rtl-optimization/97684] [11 Regression] ICE in reg_preferred_class, at reginfo.c:789 by r11-4577

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97684

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
                 CC|                            |jakub at gcc dot gnu.org
         Resolution|---                         |FIXED

--- Comment #8 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Assuming fixed.

[Bug rtl-optimization/97684] [11 Regression] ICE in reg_preferred_class, at reginfo.c:789 by r11-4577

[torbjorn.svensson at foss dot st.com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97684

Torbjörn SVENSSON <torbjorn.svensson at foss dot st.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |torbjorn.svensson at foss dot st.c
                   |                            |om

--- Comment #9 from Torbjörn SVENSSON <torbjorn.svensson at foss dot st.com> ---
In https://gcc.gnu.org/g:081c96621da658760b4a67c07530805f770fa22c, a regression
was introduced that causes GCC to segfault randomly.

The regression is due to that resize_reg_info() is no longer called after
remove_scratches() and remove_scratches() can increase the number of registers.
Due to the increase of number of registers in remove_scratches(), the resulting
out-of-bounds usage of the reg_renumber global array will have unpredictable
result.

I sent a proposal patch to resolve this issue that can be reviewed here:
https://gcc.gnu.org/pipermail/gcc-patches/2022-October/604295.html

From what I can tell, this regression exist in gcc-11, gcc-12 and master.