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* [Bug target/98065] New: [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024
@ 2020-11-30 7:23 asolokha at gmx dot com
2020-11-30 8:15 ` [Bug target/98065] " rguenth at gcc dot gnu.org
` (8 more replies)
0 siblings, 9 replies; 10+ messages in thread
From: asolokha at gmx dot com @ 2020-11-30 7:23 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98065
Bug ID: 98065
Summary: [11 Regression] ICE in rs6000_expand_vector_set, at
config/rs6000/rs6000.c:7024
Product: gcc
Version: 11.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: asolokha at gmx dot com
Target Milestone: ---
Target: powerpc-*-linux-gnu
gcc-11.0.0-alpha20201129 snapshot (g:bb67ad5cff58a707aaae645d4f45a913d8511c86)
ICEs when compiling the following testcase, reduced from
gcc/testsuite/gcc.target/i386/avx2-vec-set-1.c, w/ -mvsx -O1:
typedef int v4si __attribute__ ((vector_size (16)));
v4si
gt (v4si tr, int ci, int wd)
{
tr[wd] = ci;
return tr;
}
% powerpc-e300c3-linux-gnu-gcc-11.0.0 -mvsx -O1 -c mat0imfx.c
during RTL pass: expand
mat0imfx.c: In function 'gt':
mat0imfx.c:6:10: internal compiler error: in rs6000_expand_vector_set, at
config/rs6000/rs6000.c:7024
6 | tr[wd] = ci;
| ~~~~~~~^~~~
0x7259c7 rs6000_expand_vector_set(rtx_def*, rtx_def*, rtx_def*)
/var/tmp/portage/cross-powerpc-e300c3-linux-gnu/gcc-11.0.0_alpha20201129/work/gcc-11-20201129/gcc/config/rs6000/rs6000.c:7024
0x153b880 ???
/var/tmp/portage/cross-powerpc-e300c3-linux-gnu/gcc-11.0.0_alpha20201129/work/gcc-11-20201129/gcc/config/rs6000/vector.md:1251
0xcd0378 maybe_expand_insn(insn_code, unsigned int, expand_operand*)
/var/tmp/portage/cross-powerpc-e300c3-linux-gnu/gcc-11.0.0_alpha20201129/work/gcc-11-20201129/gcc/optabs.c:7435
0xb6a67d expand_vec_set_optab_fn
/var/tmp/portage/cross-powerpc-e300c3-linux-gnu/gcc-11.0.0_alpha20201129/work/gcc-11-20201129/gcc/internal-fn.c:2879
0xb6a67d expand_VEC_SET
/var/tmp/portage/cross-powerpc-e300c3-linux-gnu/gcc-11.0.0_alpha20201129/work/gcc-11-20201129/gcc/internal-fn.def:148
0x93e0c7 expand_call_stmt
/var/tmp/portage/cross-powerpc-e300c3-linux-gnu/gcc-11.0.0_alpha20201129/work/gcc-11-20201129/gcc/cfgexpand.c:2740
0x93e0c7 expand_gimple_stmt_1
/var/tmp/portage/cross-powerpc-e300c3-linux-gnu/gcc-11.0.0_alpha20201129/work/gcc-11-20201129/gcc/cfgexpand.c:3835
0x93e0c7 expand_gimple_stmt
/var/tmp/portage/cross-powerpc-e300c3-linux-gnu/gcc-11.0.0_alpha20201129/work/gcc-11-20201129/gcc/cfgexpand.c:3999
0x943c5a expand_gimple_basic_block
/var/tmp/portage/cross-powerpc-e300c3-linux-gnu/gcc-11.0.0_alpha20201129/work/gcc-11-20201129/gcc/cfgexpand.c:6040
0x9457bf execute
/var/tmp/portage/cross-powerpc-e300c3-linux-gnu/gcc-11.0.0_alpha20201129/work/gcc-11-20201129/gcc/cfgexpand.c:6724
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Bug target/98065] [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024
2020-11-30 7:23 [Bug target/98065] New: [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 asolokha at gmx dot com
@ 2020-11-30 8:15 ` rguenth at gcc dot gnu.org
2021-01-14 10:58 ` rguenth at gcc dot gnu.org
` (7 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: rguenth at gcc dot gnu.org @ 2020-11-30 8:15 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98065
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target Milestone|--- |11.0
Keywords| |ice-on-valid-code
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Bug target/98065] [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024
2020-11-30 7:23 [Bug target/98065] New: [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 asolokha at gmx dot com
2020-11-30 8:15 ` [Bug target/98065] " rguenth at gcc dot gnu.org
@ 2021-01-14 10:58 ` rguenth at gcc dot gnu.org
2021-01-19 11:03 ` [Bug target/98065] [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 since r11-5457 jakub at gcc dot gnu.org
` (6 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: rguenth at gcc dot gnu.org @ 2021-01-14 10:58 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98065
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Priority|P3 |P1
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Bug target/98065] [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 since r11-5457
2020-11-30 7:23 [Bug target/98065] New: [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 asolokha at gmx dot com
2020-11-30 8:15 ` [Bug target/98065] " rguenth at gcc dot gnu.org
2021-01-14 10:58 ` rguenth at gcc dot gnu.org
@ 2021-01-19 11:03 ` jakub at gcc dot gnu.org
2021-01-19 11:40 ` jakub at gcc dot gnu.org
` (5 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: jakub at gcc dot gnu.org @ 2021-01-19 11:03 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98065
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Summary|[11 Regression] ICE in |[11 Regression] ICE in
|rs6000_expand_vector_set, |rs6000_expand_vector_set,
|at |at
|config/rs6000/rs6000.c:7024 |config/rs6000/rs6000.c:7024
| |since r11-5457
CC| |jakub at gcc dot gnu.org
Status|UNCONFIRMED |NEW
Ever confirmed|0 |1
Last reconfirmed| |2021-01-19
--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Started with r11-5457-g5e9f814d754be790aec5b69a95699a8af2654058
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Bug target/98065] [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 since r11-5457
2020-11-30 7:23 [Bug target/98065] New: [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 asolokha at gmx dot com
` (2 preceding siblings ...)
2021-01-19 11:03 ` [Bug target/98065] [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 since r11-5457 jakub at gcc dot gnu.org
@ 2021-01-19 11:40 ` jakub at gcc dot gnu.org
2021-01-19 11:51 ` jakub at gcc dot gnu.org
` (4 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: jakub at gcc dot gnu.org @ 2021-01-19 11:40 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98065
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |luoxhu at gcc dot gnu.org
--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
So, with -O1 -mvsx we ICE on
typedef int V __attribute__ ((vector_size (16)));
V
foo (V x, int y, int z)
{
x[z] = y;
return x;
}
because rs6000_expand_vector_set assumes that if !VECTOR_MEM_VSX_P (mode), then
the index must be CONST_INT.
With -O1 -mvsx -mcpu=power9 it ICEs elsewhere instead:
pr98065.c:8:1: error: unrecognizable insn:
8 | }
| ^
(insn 10 9 11 2 (set (reg:V4SI 123)
(unspec:V4SI [
(reg:V4SI 123)
(reg:SI 125)
(subreg/s/u:SI (reg/v:DI 122 [ z ]) 0)
] UNSPEC_VSX_SET)) "pr98065.c":6:8 -1
(nil))
during RTL pass: vregs
pr98065.c:8:1: internal compiler error: in extract_insn, at recog.c:2769
The vsx_set_<mode>_p9 assume that the index is again CONST_INT, fits into
QImode and has also limited range based on how many elts the vector has.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Bug target/98065] [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 since r11-5457
2020-11-30 7:23 [Bug target/98065] New: [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 asolokha at gmx dot com
` (3 preceding siblings ...)
2021-01-19 11:40 ` jakub at gcc dot gnu.org
@ 2021-01-19 11:51 ` jakub at gcc dot gnu.org
2021-01-20 1:42 ` luoxhu at gcc dot gnu.org
` (3 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: jakub at gcc dot gnu.org @ 2021-01-19 11:51 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98065
--- Comment #3 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
I guess the first ICE could be fixed by using just "const_int_operand" through
define_mode_iterator for the altivec non-vsx modes in:
(define_expand "vec_set<mode>"
[(match_operand:VEC_E 0 "vlogical_operand")
(match_operand:<VEC_base> 1 "register_operand")
(match_operand 2 "reg_or_cint_operand")]
"VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
{
rs6000_expand_vector_set (operands[0], operands[1], operands[2]);
DONE;
})
but I could be wrong. I think using FAIL might not work because
can_vec_set_var_idx_p decides whether it can do the non-constant vector sets
just based on predicates (though store_bit_field_1 has a fallback).
But the P9 makes me wonder which modes can actually be used with the variable
set.
I think you need to add full testsuite coverage for all the modes and test in
all the different ISA settings the expanders care about here.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Bug target/98065] [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 since r11-5457
2020-11-30 7:23 [Bug target/98065] New: [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 asolokha at gmx dot com
` (4 preceding siblings ...)
2021-01-19 11:51 ` jakub at gcc dot gnu.org
@ 2021-01-20 1:42 ` luoxhu at gcc dot gnu.org
2021-01-22 14:04 ` cvs-commit at gcc dot gnu.org
` (2 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: luoxhu at gcc dot gnu.org @ 2021-01-20 1:42 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98065
--- Comment #4 from luoxhu at gcc dot gnu.org ---
Sorry, my patch
https://gcc.gnu.org/pipermail/gcc-patches/2020-October/555906.html
could fix this, but below two of them is still pending for approval, I pinged
it 5 times since last Oct. @Segher :)
https://gcc.gnu.org/pipermail/gcc-patches/2020-October/555907.html
https://gcc.gnu.org/pipermail/gcc-patches/2020-October/555908.html
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Bug target/98065] [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 since r11-5457
2020-11-30 7:23 [Bug target/98065] New: [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 asolokha at gmx dot com
` (5 preceding siblings ...)
2021-01-20 1:42 ` luoxhu at gcc dot gnu.org
@ 2021-01-22 14:04 ` cvs-commit at gcc dot gnu.org
2021-01-28 17:35 ` seurer at gcc dot gnu.org
2021-01-29 1:36 ` luoxhu at gcc dot gnu.org
8 siblings, 0 replies; 10+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2021-01-22 14:04 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98065
--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Xiong Hu Luo <luoxhu@gcc.gnu.org>:
https://gcc.gnu.org/g:b29225597584b697762585e0b707b7cb4b427650
commit r11-6857-gb29225597584b697762585e0b707b7cb4b427650
Author: Xionghu Luo <luoxhu@linux.ibm.com>
Date: Thu Jan 21 21:01:24 2021 -0600
rs6000: Support variable insert and Expand vec_insert in expander [PR79251]
vec_insert accepts 3 arguments, arg0 is input vector, arg1 is the value
to be insert, arg2 is the place to insert arg1 to arg0. Current expander
generates stxv+stwx+lxv if arg2 is variable instead of constant, which
causes serious store hit load performance issue on Power. This patch tries
1) Build VIEW_CONVERT_EXPR for vec_insert (i, v, n) like v[n&3] = i to
unify the gimple code, then expander could use vec_set_optab to expand.
2) Expand the IFN VEC_SET to fast instructions: lvsr+insert+lvsl.
In this way, "vec_insert (i, v, n)" and "v[n&3] = i" won't be expanded too
early in gimple stage if arg2 is variable, avoid generating store hit load
instructions.
For Power9 V4SI:
addi 9,1,-16
rldic 6,6,2,60
stxv 34,-16(1)
stwx 5,9,6
lxv 34,-16(1)
=>
rlwinm 6,6,2,28,29
mtvsrwz 0,5
lvsr 1,0,6
lvsl 0,0,6
xxperm 34,34,33
xxinsertw 34,0,12
xxperm 34,34,32
Though instructions increase from 5 to 7, the performance is improved
60% in typical cases.
Tested with V2DI, V2DF V4SI, V4SF, V8HI, V16QI on Power9-LE.
2021-01-22 Xionghu Luo <luoxhu@linux.ibm.com>
gcc/ChangeLog:
PR target/79251
PR target/98065
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Ajdust variable index vec_insert from address dereference to
ARRAY_REF(VIEW_CONVERT_EXPR) tree expression.
* config/rs6000/rs6000-protos.h (rs6000_expand_vector_set_var):
New declaration.
* config/rs6000/rs6000.c (rs6000_expand_vector_set_var): New
function.
2021-01-22 Xionghu Luo <luoxhu@linux.ibm.com>
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr79251.p9.c: New test.
* gcc.target/powerpc/pr79251-run.c: New test.
* gcc.target/powerpc/pr79251.h: New header.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Bug target/98065] [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 since r11-5457
2020-11-30 7:23 [Bug target/98065] New: [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 asolokha at gmx dot com
` (6 preceding siblings ...)
2021-01-22 14:04 ` cvs-commit at gcc dot gnu.org
@ 2021-01-28 17:35 ` seurer at gcc dot gnu.org
2021-01-29 1:36 ` luoxhu at gcc dot gnu.org
8 siblings, 0 replies; 10+ messages in thread
From: seurer at gcc dot gnu.org @ 2021-01-28 17:35 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98065
seurer at gcc dot gnu.org changed:
What |Removed |Added
----------------------------------------------------------------------------
Resolution|--- |FIXED
Status|NEW |RESOLVED
CC| |seurer at gcc dot gnu.org
--- Comment #6 from seurer at gcc dot gnu.org ---
This appears to be fixed from testing with latest trunk.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Bug target/98065] [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 since r11-5457
2020-11-30 7:23 [Bug target/98065] New: [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 asolokha at gmx dot com
` (7 preceding siblings ...)
2021-01-28 17:35 ` seurer at gcc dot gnu.org
@ 2021-01-29 1:36 ` luoxhu at gcc dot gnu.org
8 siblings, 0 replies; 10+ messages in thread
From: luoxhu at gcc dot gnu.org @ 2021-01-29 1:36 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98065
Bug 98065 depends on bug 98799, which changed state.
Bug 98799 Summary: [11 Regression] vector_set_var ICE
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98799
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |RESOLVED
Resolution|--- |FIXED
^ permalink raw reply [flat|nested] 10+ messages in thread
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2020-11-30 7:23 [Bug target/98065] New: [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 asolokha at gmx dot com
2020-11-30 8:15 ` [Bug target/98065] " rguenth at gcc dot gnu.org
2021-01-14 10:58 ` rguenth at gcc dot gnu.org
2021-01-19 11:03 ` [Bug target/98065] [11 Regression] ICE in rs6000_expand_vector_set, at config/rs6000/rs6000.c:7024 since r11-5457 jakub at gcc dot gnu.org
2021-01-19 11:40 ` jakub at gcc dot gnu.org
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2021-01-20 1:42 ` luoxhu at gcc dot gnu.org
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